IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
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Aug 24, 2026 - Shell
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IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.
Python script for generating lookup tables for the gm/ID design methodology and much more ...
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz s 8000 ignal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
12 agentic skills for analog IC design — architecture, sizing, verification, cross-model review, knowledge graph, and self-evolution. Works with or without EDA.
This project is about designing a 1.5 bit stage Pipeline ADC & the OpAmp required for its MDAC.
Fundamental analog circuit designs to kick start and embark the journey in the world of IC design.
This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.
Online viewer of Xschem schematic files
This project shows the design process of the main blocks of a typical RX frontend system.
This library is an attempt to make transistor sizing for Analog design less painful.
This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using high-swing cascode current mirror structures for the current source arrays.
A MATLAB project that uses modified nodal analysis to calculate the node voltages of any analog circuit.
An LTspice project which contains third-order Butterworth filters built both using an inductor and a current conveyor.
Design of miller compensated 2 stage opamp using open source SKY130PDK
An EDA tool for automatic device sizing using Gm/Id method.
AnalogStudio is a comprehensive, professional-grade Electronic Design Automation (EDA) software suite developed by Algo Science Lab for designing, simulating, analyzing, and laying out analog integrated circuits (IC).
This project is about building a high FOM 2.4 GHz LNA for Bluetooth Low-Energy (BLE) Standards, using 45nm CMOS technology.
Design of 6T, 8T and 10T SRAM Cells with Static Noise Margin Analysis
This project is about building a Clocked Comparator to be used in a 4-bit Flash ADC & minimize the ADC Figure of Merit given by FoM = Power / (fs*2ENOB).
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