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dma

Here are 11 public repositories matching this topic...

Hamid-R-Tanhaei / ZYNQ_ADC_DMA_LWIP

Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP

java i2c freertos adc lwip ethernet tcp-ip fpga-soc dma zynq-7000 z-turn ad9288 ad9577

Updated Jun 23, 2021
VHDL

pothosware / PothosZynq

DMA source and sink blocks for Xilinx Zynq FPGAs

fpga zynq xilinx vivado dma pothos pothos-framework

Updated May 19, 2020
VHDL

GOOD-Stuff / dma-sg-udp

Example of transfer UDP packets from AXI DMA with SG mode.

linux udp sg dma zynq-7010 axi-dma scatter-gather

Updated Feb 5, 2018
VHDL

mrengineer / Zynq7000_simpleDMA_IRQ_vivado_linux_userspace

Complete project in Vivado 2022.1 + userspace app for petalinux. Loopback AXI simple DMA transfer.

petalinux dma axi

Updated May 20, 2023
VHDL

ChanonTonmai / ADS1115-VHDL-with-AXI-DMA

ADS1115 Communication with AXI interface example with zybo board

fpga i2c xilinx adc dma ads1115

Updated Mar 27, 2021
VHDL

Nikronic / CAD_2018

Some of small codes and implementation of modules in Computer Aided Design in VHDL by ActiveHDL

Updated Jun 3, 2018
VHDL

tsotnep / ETSE_GDSP

Repository for DSP matrix multiplier IP core and other related side projects

fpga matrix-multiplication zedboard dma

Updated Mar 14, 2017
VHDL

adilsondias-engineer / 21-fpga-pcie-gpu-bridge

FPGA PCIe bridge to GPU - High-bandwidth interface for FPGA-GPU communication

fpga gpu vhdl xilinx dma pcie artix-7 high-bandwidth

Updated Jan 24, 2026
VHDL

AlbianSalihu / FPGA-Audio-Effect

Custom DMA and IRQ Sender IP cores in VHDL on Intel DE1-SoC. Dual Nios II processors coordinate over Avalon to record, FFT-filter, and play back audio.

fpga signal-processing dsp vhdl embedded-systems dma nios-ii avalon-bus

Updated Apr 16, 2026
VHDL

SergeyBekrenyov / Zybo-Z7-20-pcam-5c

forked Digilent Demo

gamma bayer dma mipi-csi

Updated Jul 28, 2020
VHDL

Jonathan-Moradi / dma-controller-vhdl

DMA Controller implemented in VHDL — Bus Master with FSM-based memory transfer logic.

fpga vhdl vlsi modelsim dma digital-design quartus

Updated May 17, 2026
VHDL

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