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[DiffusionGemma-26B-A4B-it][XPU] Fix DiffusionGemma for TP>1 and enable XPU - #45774

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[DiffusionGemma-26B-A4B-it][XPU] Fix DiffusionGemma for TP>1 and enable XPU#45774
sureshnam wants to merge 3 commits into
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@sureshnam
@sureshnam sureshnam commented Jun 16, 2026
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Two fixes to the DiffusionGemma sampler, both needed to serve the model beyond the single-GPU (TP=1) reference configuration.

  1. TP>1 correctness (all backends). The self-conditioning soft embedding computes probs @ embed_weight over the full vocab, but was passed the tensor-parallel-sharded VocabParallelEmbedding weight. At TP=1 this is a no-op; at TP>1 the reduction dims mismatch and dynamo tracing fails. Add _get_full_embed_weight() to all-gather the shards once at sampler construction (TP=1 path unchanged; one-time gather, not per-step).

  2. XPU: avoid UVA pointers in compiled kernels. The sampler feeds UVA (pinned-host + device-view) buffers into torch.compile'd regions; the triton-xpu launcher rejects host-USM pointers. On XPU, use real device copies for decode_slots/decode_idx/num_logits. CUDA path is unchanged (guarded by current_platform.is_xpu()).

Validated serving DiffusionGemma-26B-A4B-it on 4x Intel Arc Pro B70 at TP=2 and TP=4.

Purpose

Enable DiffusionGemma-26B-A4B-it on XPU

Test Plan

Test Result


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@mergify mergify Bot added the intel-gpu Related to Intel GPU label Jun 16, 2026
Two fixes to the DiffusionGemma sampler, both needed to serve the model
beyond the single-GPU (TP=1) reference configuration.

1. TP>1 correctness (all backends). The self-conditioning soft embedding
   computes `probs @ embed_weight` over the full vocab, but was passed the
   tensor-parallel-sharded VocabParallelEmbedding weight. At TP=1 this is a
   no-op; at TP>1 the reduction dims mismatch and dynamo tracing fails. Add
   `_get_full_embed_weight()` to all-gather the shards once at sampler
   construction (TP=1 path unchanged; one-time gather, not per-step).

2. XPU: avoid UVA pointers in compiled kernels. The sampler feeds UVA
   (pinned-host + device-view) buffers into torch.compile'd regions; the
   triton-xpu launcher rejects host-USM pointers. On XPU, use real device
   copies for decode_slots/decode_idx/num_logits. CUDA path is unchanged
   (guarded by current_platform.is_xpu()).

Validated serving DiffusionGemma-26B-A4B-it on 4x Intel Arc Pro B70 at TP=2
and TP=4.

Signed-off-by: Suresh Nampalli <suresh.b.nampalli@intel.com>
@sureshnam
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@skavulya could you review.

Sandermage added a commit to Sandermage/sndr_core_engine that referenced this pull request Jun 26, 2026
…t vllm#45774) + render apply-step fix

G4_26 backports the TP-correctness half of OPEN vLLM PR #45774 — the SINGLE remaining
blocker for DiffusionGemma full TP=2 serving after PN-FP8MOE-KPAD cleared the Marlin
N=352 crash. DiffusionGemmaForBlockDiffusion self-conditioning does probs @ embed_weight
over the FULL vocab (262144); at TP=2 embed_tokens.weight is vocab-sharded to [131072,2816]
-> 'RuntimeError: a and b must have same reduction dim ... X [131072, 2816]'.

Patch (TextPatcher on model_executor/models/diffusion_gemma.py, 3 sub-patches):
  1. add `from vllm.distributed import (get_tensor_model_parallel_world_size,
     tensor_model_parallel_all_gather)`
  2. add module-level `_get_full_embed_weight(embed_tokens)` (TP=1 early-return;
     else all_gather(weight, dim=0) -> [262144,2816], slice [:org_vocab_size])
  3. swap the line-853 sampler ctor arg embed_weight=...embed_tokens.weight ->
     _get_full_embed_weight(...embed_tokens). XPU/UVA hunks skipped; dead
     compute_self_conditioning untouched.
Patcher-level upstream_drift_markers=['def _get_full_embed_weight'] self-skips on #45774
merge. default_on=False (env GENESIS_ENABLE_G4_26_DIFFUSIONGEMMA_TP_VOCAB), arch-gated.

CRITICAL fix from adversarial review: the runtime arch-gate probed the HF arch STRING
DiffusionGemmaForBlockDiffusion, which is never a module attribute -> apply() self-skipped
even with the env flag ON (silent no-op). Corrected the probe to the actual vLLM CLASS
DiffusionGemmaForConditionalGeneration (the registry maps the HF string to it). The
registry applies_to.model_arch stays DiffusionGemmaForBlockDiffusion (the dispatcher
matches HF strings — correct). Added a gate regression-guard test (True for the vLLM class,
False for the HF-string-only source — the exact bug).

Render fix: sndr/model_configs/emitters/docker_cmd.py apply-step
`python3 -m vllm.sndr_core.apply` -> `python3 -m sndr.apply`. The vllm.sndr_core shim was
removed at v12.0; freshly-rendered launchers that drop the legacy mirror mount failed apply
(ModuleNotFoundError) -> Genesis patches silently didn't apply. TDD test asserts the
rendered launcher uses sndr.apply and not the legacy shim.

ZERO PROD risk: arch-gated + TP-gated + default_on=False; PROD 35B (Qwen3.6 arch) never
imports diffusion_gemma.py. Verified: g4_26 tests 16 passed (incl. gate guard); render test
passed; shadow --strict CLEAN; audit_registry_contract CLEAN (316). Patcher verified
applying against live dev491 source (adversarial review). Next: rig-validate DiffusionGemma
TP=2 boot (PN-FP8MOE-KPAD + G4_26 enabled) on a non-PROD launch.

Refs: vllm-project/vllm#45774 (OPEN), #45719. Plan:
sndr_private/planning/research/2026-06-17-dgemma-tpvocab-plus-sweep.md
@mergify
mergify Bot commented Jun 26, 2026
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This pull request has merge conflicts that must be resolved before it can be
merged. Please rebase the PR, @sureshnam.

https://docs.github.com/en/pull-requests/collaborating-with-pull-requests/working-with-forks/syncing-a-fork

@mergify mergify Bot added the needs-rebase label Jun 26, 2026
@skavulya
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Thanks @sureshnam The XPU-specific changes to avoid UVA pointers look good to me. There are changes to custom_sampler in latest main. which handle TP. Please update your branch and check if your changes to custom_sampler are still needed.

@jikunshang
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what's the problem of uva on XPU?

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