Graphical logic editor/simulator
A platform for learning and experimenting with logic circuits
C++ GUI implementation of a nand gate game. Supports local and multiplayer lobbies through a TypeScript matchmaking server.
ViPeR 32-bit Pipelined RISC-V CPU
Materials for the Computer Science course, Digital Design (Logic Circuits)
Gate-Level Simulation on a GPU
Digital Logic Design Project materials & coursework featuring logic design, K-Map simplification, code converters, circuits and Smart Railway Gate System Project analysis during my CSE 2102 coursework.
An eurorack logic module with several logic functions and a clock divider mode. Build around an arduino nano. So could be reprogrammed.
DIGITAL LOGIC DESIGN
Logicarium is a minimalist, performant, visual logic design environment. Design complex digital systems using a high-density, performant interface. Custom gates for modular logic, and a visual DSL for script with real-time synchronization and code generation, all hardware-accelerated.
Algorithm that extracts a circuit from a netlist and performs fault collapsing
A Distance Meter that uses no MCU
C++ code for Logic-Gates Concept.
C++ header-only And-Inverter graph (AIG) library
The GLL Simulator is a visual logic gate simulator built with SFML. Write circuits in the multipurpose Gate Logic Language. Then watch signals propagate in real time, toggle inputs, and control any environment compatible with the Modbus protocol!
A Automated Demonstrator written in Prolog. That can be used as SAT solver when you place one formula on thesis (tautology test).
A C++ digital circuit logic simulator, created as part of Epitech’s second-year curriculum.
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