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Thermal Visualization of Buried Interfaces by Transient and Steady-State Responses of Time-Domain Thermoreflectance
Authors:
Zhe Cheng,
Fengwen Mu,
Xiaoyang Ji,
Tiangui You,
Wenhui Xu,
Tadatomo Suga,
Xin Ou,
David G. Cahill,
Samuel Graham
Abstract:
Thermal resistances from interfaces impede heat dissipation in micro/nanoscale electronics, especially for high-power electronics. Despite the growing importance of understanding interfacial thermal transport, advanced thermal characterization techniques which can visualize thermal conductance across buried interfaces, especially for nonmetal-nonmetal interfaces, are still under development. This…
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Thermal resistances from interfaces impede heat dissipation in micro/nanoscale electronics, especially for high-power electronics. Despite the growing importance of understanding interfacial thermal transport, advanced thermal characterization techniques which can visualize thermal conductance across buried interfaces, especially for nonmetal-nonmetal interfaces, are still under development. This work reports a dual-modulation-frequency TDTR mapping technique to visualize the thermal conduction across buried semiconductor interfaces for beta-Ga2O3-SiC samples. Both the beta-Ga2O3 thermal conductivity and the buried beta-Ga2O3-SiC thermal boundary conductance (TBC) are visualized for an area of 200 um x 200 um. Areas with low TBC values ( smaller than 20 MW/m2-K) are successfully identified on the TBC map, which correspond to weakly bonded interfaces caused by high-temperature annealing. The steady-state temperature rise (detector voltage), usually ignored in TDTR measurements, is found to be able to probe TBC variations of the buried interfaces without the limit of thermal penetration depth. This technique can be applied to detect defects/voids in deeply buried heterogeneous interfaces non-destructively, and also opens a door for the visualization of thermal conductance in nanoscale nonhomogeneous structures.
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Submitted 14 March, 2021;
originally announced March 2021.
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Wafer-scale Heterogeneous Integration of Monocrystalline \b{eta}-Ga2O3 Thin Films on SiC for Thermal Management by Ion-Cutting Technique
Authors:
Zhe Cheng,
Fengwen Mu,
Tiangui You,
Wenhui Xu,
Jingjing Shi,
Michael E. Liao,
Yekan Wang,
Kenny Huynh,
Tadatomo Suga,
Mark S. Goorsky,
Xin Ou,
Samuel Graham
Abstract:
The ultra-wide bandgap, high breakdown electric field, and large-area affordable substrates make \b{eta}-Ga2O3 promising for applications of next-generation power electronics while its thermal conductivity is at least one order of magnitude lower than other wide/ultrawide bandgap semiconductors. To avoid the degradation of device performance and reliability induced by the localized Joule-heating,…
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The ultra-wide bandgap, high breakdown electric field, and large-area affordable substrates make \b{eta}-Ga2O3 promising for applications of next-generation power electronics while its thermal conductivity is at least one order of magnitude lower than other wide/ultrawide bandgap semiconductors. To avoid the degradation of device performance and reliability induced by the localized Joule-heating, aggressive thermal management strategies are essential, especially for high-power high-frequency applications. This work reports a scalable thermal management strategy to heterogeneously integrate wafer-scale monocrystalline \b{eta}-Ga2O3 thin films on high thermal conductivity SiC substrates by ion-cutting technique. The thermal boundary conductance (TBC) of the \b{eta}-Ga2O3-SiC interfaces and thermal conductivity of the \b{eta}-Ga2O3 thin films were measured by Time-domain Thermoreflectance (TDTR) to evaluate the effects of interlayer thickness and thermal annealing. Materials characterizations were performed to understand the mechanisms of thermal transport in these structures. The results show that the \b{eta}-Ga2O3-SiC TBC values increase with decreasing interlayer thickness and the \b{eta}-Ga2O3 thermal conductivity increases more than twice after annealing at 800 oC due to the removal of implantation-induced strain in the films. A Callaway model is built to understand the measured thermal conductivity. Small spot-to-spot variations of both TBC and Ga2O3 thermal conductivity confirm the uniformity and high-quality of the bonding and exfoliation. Our work paves the way for thermal management of power electronics and \b{eta}-Ga2O3 related semiconductor devices.
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Submitted 26 May, 2020;
originally announced May 2020.
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Interfacial Thermal Conductance across Room-Temperature Bonded GaN-Diamond Interfaces for GaN-on-Diamond Devices
Authors:
Zhe Cheng,
Fengwen Mu,
Luke Yates,
Tadatomo Suga,
Samuel Graham
Abstract:
The wide bandgap, high-breakdown electric field, and high carrier mobility makes GaN an ideal material for high-power and high-frequency electronics applications such as wireless communication and radar systems. However, the performance and reliability of GaN-based HEMTs are limited by the high channel temperature induced by Joule-heating in the device channel. High thermal conductivity substrates…
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The wide bandgap, high-breakdown electric field, and high carrier mobility makes GaN an ideal material for high-power and high-frequency electronics applications such as wireless communication and radar systems. However, the performance and reliability of GaN-based HEMTs are limited by the high channel temperature induced by Joule-heating in the device channel. High thermal conductivity substrates integrated with GaN can improve the extraction of heat from GaN based HEMTs and lower the device operating temperature. However, heterogeneous integration of GaN with diamond substrates is not trivial and presents technical challenges to maximize the heat dissipation potential brought by the diamond substrate. In this work, two modified room temperature surface activated bonding techniques are used to bond GaN and single crystal diamond with different interlayer thicknesses. TDTR is used to measure the thermal properties from room temperature to 480 K. A relatively large TBC of the GaN-diamond interfaces with a 4nm interlayer was observed and material characterization was performed to link the structure of the interface to the TBC. Device modeling shows that the measured GaN-diamond TBC values obtained from bonding can enable high power GaN devices by taking the full advantage of the high thermal conductivity of single crystal diamond and achieve excellent cooling effect. Furthermore, the room-temperature bonding process in this work do not induce stress problem due to different coefficient of thermal expansion in other high temperature integration processes in previous studies. Our work sheds light on the potential for room-temperature heterogeneous integration of semiconductors with diamond for applications of electronics cooling especially for GaN-on-diamond devices.
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Submitted 4 September, 2019;
originally announced September 2019.
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High Thermal Boundary Conductance across Bonded Heterogeneous GaN-SiC Interfaces
Authors:
Fengwen Mu,
Zhe Cheng,
Jingjing Shi,
Seongbin Shin,
Bin Xu,
Junichiro Shiomi,
Samuel Graham,
Tadatomo Suga
Abstract:
GaN-based HEMTs have the potential to be widely used in high-power and high-frequency electronics while their maximum output powers are limited by high channel temperature induced by near-junction Joule-heating, which degrades device performance and reliability. Increasing the TBC between GaN and SiC will aid in the heat dissipation of GaN-on-SiC power devices, taking advantage of the high thermal…
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GaN-based HEMTs have the potential to be widely used in high-power and high-frequency electronics while their maximum output powers are limited by high channel temperature induced by near-junction Joule-heating, which degrades device performance and reliability. Increasing the TBC between GaN and SiC will aid in the heat dissipation of GaN-on-SiC power devices, taking advantage of the high thermal conductivity of the SiC substrate. However, a good understanding of the TBC of this technically important interface is still lacking due to the complicated nature of interfacial heat transport. In this work, a lattice-mismatch-insensitive surface activated bonding method is used to bond GaN directly to SiC and thus eliminating the AlN layer altogether. This allows for the direct integration of high quality GaN layers with SiC to create a high thermal boundary conductance interface. TDTR is used to measure the thermal properties of the GaN thermal conductivity and GaN-SiC TBC. The measured GaN thermal conductivity is larger than that of GaN grown by MBE on SiC, showing the impact of reducing the dislocations in the GaN near the interface. High GaN-SiC TBC is observed for the bonded GaN-SiC interfaces, especially for the annealed interface whose TBC (230 MW/m2-K) is close to the highest values ever reported. To understand the structure-thermal property relation, STEM and EELS are used to characterize the interface structure. The results show that, for the as-bonded sample, there exists an amorphous layer near the interface for the as bonded samples. This amorphous layer is crystallized upon annealing, leading to the high TBC found in our work. Our work paves the way for thermal transport across bonded interfaces, which will impact real-world applications of semiconductor integration and packaging.
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Submitted 10 May, 2019;
originally announced May 2019.
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Strain effect in highly-doped n-type 3C-SiC-on-glass substrate for mechanical sensors and mobility enhancement
Authors:
Hoan-Phuong Phan,
Tuan-Khoa Nguyen,
Toan Dinh,
Han-Hao Cheng,
Fengwen Mu,
Alan Iacopi,
Leonie Hold,
Tadatomo Suga,
Dzung Viet Dao,
Debbie G. Senesky,
Nam-Trung Nguyen
Abstract:
This work reports the strain effect on the electrical properties of highly doped n-type single crystalline cubic silicon carbide (3C-SiC) transferred onto a 6-inch glass substrate employing an anodic bonding technique. The experimental data shows high gauge factors of -8.6 in longitudinal direction and 10.5 in transverse direction along the [100] orientation. The piezoresistive effect in the highl…
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This work reports the strain effect on the electrical properties of highly doped n-type single crystalline cubic silicon carbide (3C-SiC) transferred onto a 6-inch glass substrate employing an anodic bonding technique. The experimental data shows high gauge factors of -8.6 in longitudinal direction and 10.5 in transverse direction along the [100] orientation. The piezoresistive effect in the highly doped 3C-SiC film also exhibits an excellent linearity and consistent reproducibility after several bending cycles. The experimental result was in good agreement with the theoretical analysis based on the phenomenon of electron transfer between many valleys in the conduction band of n-type 3C-SiC. Our finding for the large gauge factor in n-type 3C- SiC coupled with the elimination of the current leak to the insulated substrate could pave the way for the development of single crystal SiC-on-glass based MEMS applications.
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Submitted 22 February, 2018;
originally announced February 2018.