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Active Continual Learning with Metaplastic Binary Bayesian Neural Networks
Authors:
Kellian Cottart,
Théo Ballet,
Djohan Bonnet,
Damien Querlioz
Abstract:
Always-on edge systems must keep learning as conditions change under tight compute budgets and must detect unreliable predictions. Bayesian binary neural networks are attractive in this setting, but mean-field Bernoulli posteriors can saturate on long non-stationary streams, wiping out epistemic uncertainty and freezing plasticity. We propose BiMU, derived from a bounded-memory variational objecti…
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Always-on edge systems must keep learning as conditions change under tight compute budgets and must detect unreliable predictions. Bayesian binary neural networks are attractive in this setting, but mean-field Bernoulli posteriors can saturate on long non-stationary streams, wiping out epistemic uncertainty and freezing plasticity. We propose BiMU, derived from a bounded-memory variational objective that balances stability, plasticity, and forgetting. BiMU combines a data term with controlled relaxation toward the prior and an uncertainty-dependent step size that prevents saturation and sustains informative uncertainty. This non-degenerate posterior enables fully online, buffer-free active querying via Monte Carlo disagreement, reducing label queries and backpropagation updates under imbalance. BiMU sustains learning and strong OOD detection on 1000-tasks Permuted-MNIST, and on OpenLORIS-Object achieves up to 32$\times$ label/update savings at matched accuracy under class imbalance and feature compression.
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Submitted 28 May, 2026;
originally announced May 2026.
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Uncertainty-triggered wake-up enables energy-efficient, error-resilient edge AI with memristor front ends
Authors:
Théo Ballet,
Aymen Romdhane,
Bruno Lovison-Franco,
Théo Dupuis,
Adrien Renaudineau,
Felipe Paiva Alencar,
Mohammed Akib Iftakher,
Clément Turck,
Kamel-Eddine Harabi,
Elisa Vianello,
Jean-Michel Portal,
Pascal Benoit,
David Novo,
Damien Querlioz
Abstract:
Memristor computing offers a route to low-energy edge AI, but device variability, sensitivity to operating conditions, and system-integration challenges can hinder deployment. Here we show that these limitations can be mitigated by using memristor AI not as the final decision maker but as the ultra-low-power, always-on front end of a heterogeneous inference system. We implement this architecture b…
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Memristor computing offers a route to low-energy edge AI, but device variability, sensitivity to operating conditions, and system-integration challenges can hinder deployment. Here we show that these limitations can be mitigated by using memristor AI not as the final decision maker but as the ultra-low-power, always-on front end of a heterogeneous inference system. We implement this architecture by coupling a fabricated memristor Bayesian machine to a programmable CPU running a higher-power, higher-accuracy software neural network. The memristor front end acts as a probabilistic screener. When it predicts an abnormal event or produces an ambiguous or invalid output, a dedicated hardware wake-up path activates the CPU, which produces the final decision. We validate this architecture on a heartbeat-classification benchmark by interfacing the fabricated Bayesian machine with an FPGA-based wake-up platform and CPU back end. The resulting uncertainty-triggered wake-up system achieves high final classification accuracy under nominal operation and maintains this accuracy even when the memristor front end is degraded by voltage scaling or reduced programming margins, because unreliable outputs are converted into recoverable wake-up events instead of becoming silent errors. Post-layout analysis of an ASIC implementation shows that average energy is governed primarily by wake-up frequency, providing practical design rules for choosing front-end operating points. These results establish uncertainty-triggered wake-up as a strategy for energy-efficient, error-resilient edge AI.
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Submitted 28 May, 2026;
originally announced May 2026.
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Forward-only learning in memristor arrays with month-scale stability
Authors:
Adrien Renaudineau,
Mamadou Hawa Diallo,
Théo Dupuis,
Bastien Imbert,
Mohammed Akib Iftakher,
Kamel-Eddine Harabi,
Clément Turck,
Tifenn Hirtzlin,
Djohan Bonnet,
Franck Melul,
Jorge-Daniel Aguirre-Morales,
Elisa Vianello,
Marc Bocquet,
Jean-Michel Portal,
Damien Querlioz
Abstract:
Turning memristor arrays from efficient inference engines into systems capable of on-chip learning has proved difficult. Weight updates have a high energy cost and cause device wear, analog states drift, and backpropagation requires a backward pass with reversed signal flow. Here we experimentally demonstrate learning on standard filamentary HfOx/Ti arrays that addresses these challenges with two…
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Turning memristor arrays from efficient inference engines into systems capable of on-chip learning has proved difficult. Weight updates have a high energy cost and cause device wear, analog states drift, and backpropagation requires a backward pass with reversed signal flow. Here we experimentally demonstrate learning on standard filamentary HfOx/Ti arrays that addresses these challenges with two design choices. First, we rely on forward-only training algorithms in the Forward-Forward family that use only inference-style operations. Second, we use sub-1 V reset-only, single-pulse updates that cut energy and yield stable analog states. We train two-layer classifiers on an ImageNet-resolution four-class task using arrays up to 8,064 devices. Two forward-only variants, two-pass supervised Forward-Forward and a single-pass competitive rule, achieve test accuracies of 89.5% and 89.6%, respectively; a reference experiment using backpropagation reaches 90.0%. Across five independent runs per method, these accuracies are indistinguishable within statistical uncertainty. Trained models retain accuracy for at least one month under ambient conditions, consistent with the stability of reset-only states. Sub-1 V reset updates use 460 times less energy than conventional program-and-verify programming and require just 46% more energy than inference-only operation. Together, these results establish forward-only, sub-1 V learning on standard filamentary stacks at array scale, outlining a practical, pulse-aware route to adaptive edge intelligence.
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Submitted 4 March, 2026; v1 submitted 14 January, 2026;
originally announced January 2026.
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Unsupervised local learning based on voltage-dependent synaptic plasticity for resistive and ferroelectric synapses
Authors:
Nikhil Garg,
Ismael Balafrej,
Joao Henrique Quintino Palhares,
Laura Bégon-Lours,
Davide Florini,
Donato Francesco Falcone,
Tommaso Stecconi,
Valeria Bragaglia,
Bert Jan Offrein,
Jean-Michel Portal,
Damien Querlioz,
Yann Beilliard,
Dominique Drouin,
Fabien Alibart
Abstract:
The deployment of AI on edge computing devices faces significant challenges related to energy consumption and functionality. These devices could greatly benefit from brain-inspired learning mechanisms, allowing for real-time adaptation while using low-power. In-memory computing with nanoscale resistive memories may play a crucial role in enabling the execution of AI workloads on these edge devices…
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The deployment of AI on edge computing devices faces significant challenges related to energy consumption and functionality. These devices could greatly benefit from brain-inspired learning mechanisms, allowing for real-time adaptation while using low-power. In-memory computing with nanoscale resistive memories may play a crucial role in enabling the execution of AI workloads on these edge devices. In this study, we introduce voltage-dependent synaptic plasticity (VDSP) as an efficient approach for unsupervised and local learning in memristive synapses based on Hebbian principles. This method enables online learning without requiring complex pulse-shaping circuits typically necessary for spike-timing-dependent plasticity (STDP). We show how VDSP can be advantageously adapted to three types of memristive devices (TiO$_2$, HfO$_2$-based metal-oxide filamentary synapses, and HfZrO$_4$-based ferroelectric tunnel junctions (FTJ)) with disctinctive switching characteristics. System-level simulations of spiking neural networks incorporating these devices were conducted to validate unsupervised learning on MNIST-based pattern recognition tasks, achieving state-of-the-art performance. The results demonstrated over 83% accuracy across all devices using 200 neurons. Additionally, we assessed the impact of device variability, such as switching thresholds and ratios between high and low resistance state levels, and proposed mitigation strategies to enhance robustness.
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Submitted 28 October, 2025;
originally announced October 2025.
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Intrinsic Annealing in a Hybrid Memristor-Magnetic Tunnel Junction Ising Machine
Authors:
Mohammed Akib Iftakher,
Hugo Levices,
Kamel-Eddine Harabi,
Adrien Renaudineau,
Mathieu-Coumba Faye,
Corentin Bouchard,
Florian Disdier,
Bernard Viala,
Elisa Vianello,
Philippe Talatchian,
Kevin Garello,
Damien Querlioz,
Louis Hutin
Abstract:
Hardware implementations of the Ising model offer promising solutions to large-scale optimization tasks. In the literature, various nanodevices have been shown to emulate the spin dynamics for such Ising machines with remarkable effectiveness. Other nanodevices have been shown to implement spin-spin coupling with compact footprint and minimal energy dissipation. However, an ideal Ising machine wou…
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Hardware implementations of the Ising model offer promising solutions to large-scale optimization tasks. In the literature, various nanodevices have been shown to emulate the spin dynamics for such Ising machines with remarkable effectiveness. Other nanodevices have been shown to implement spin-spin coupling with compact footprint and minimal energy dissipation. However, an ideal Ising machine would associate both types of nanodevices, and they must operate synergistically to support annealing: a progressive reduction of machine stochasticity that allows it to settle to energy minimum. Here, we report an Ising machine that combines two nanotechnologies: memristor crossbar -- storing multi-level couplings -- and stochastic magnetic tunnel junction (SMTJ), acting as thermally driven spins. Because the same read voltage that interrogates the crossbar also biases the SMTJs, increasing this voltage automatically lowers the effective temperature of the machine, providing an intrinsic, nearly circuit-free annealing technique. Operating at zero magnetic field, our prototype consistently reaches the global optimum of a 24-vertex weighted MAX-CUT and a 10-vertex, three-color graph-coloring problem. Given that both nanotechnologies in our demonstrator are CMOS-integrated, this approach is compatible with advanced 3D integration, offering a scalable pathway toward compact, fast, and energy-efficient large-scale Ising solvers.
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Submitted 17 June, 2025;
originally announced June 2025.
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Bayesian continual learning and forgetting in neural networks
Authors:
Djohan Bonnet,
Kellian Cottart,
Tifenn Hirtzlin,
Tarcisius Januel,
Thomas Dalgaty,
Elisa Vianello,
Damien Querlioz
Abstract:
Biological synapses effortlessly balance memory retention and flexibility, yet artificial neural networks still struggle with the extremes of catastrophic forgetting and catastrophic remembering. Here, we introduce Metaplasticity from Synaptic Uncertainty (MESU), a Bayesian framework that updates network parameters according their uncertainty. This approach allows a principled combination of learn…
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Biological synapses effortlessly balance memory retention and flexibility, yet artificial neural networks still struggle with the extremes of catastrophic forgetting and catastrophic remembering. Here, we introduce Metaplasticity from Synaptic Uncertainty (MESU), a Bayesian framework that updates network parameters according their uncertainty. This approach allows a principled combination of learning and forgetting that ensures that critical knowledge is preserved while unused or outdated information is gradually released. Unlike standard Bayesian approaches -- which risk becoming overly constrained, and popular continual-learning methods that rely on explicit task boundaries, MESU seamlessly adapts to streaming data. It further provides reliable epistemic uncertainty estimates, allowing out-of-distribution detection, the only computational cost being to sample the weights multiple times to provide proper output statistics. Experiments on image-classification benchmarks demonstrate that MESU mitigates catastrophic forgetting, while maintaining plasticity for new tasks. When training 200 sequential permuted MNIST tasks, MESU outperforms established continual learning techniques in terms of accuracy, capability to learn additional tasks, and out-of-distribution data detection. Additionally, due to its non-reliance on task boundaries, MESU outperforms conventional learning techniques on the incremental training of CIFAR-100 tasks consistently in a wide range of scenarios. Our results unify ideas from metaplasticity, Bayesian inference, and Hessian-based regularization, offering a biologically-inspired pathway to robust, perpetual learning.
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Submitted 18 April, 2025;
originally announced April 2025.
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Roadmap to Neuromorphic Computing with Emerging Technologies
Authors:
Adnan Mehonic,
Daniele Ielmini,
Kaushik Roy,
Onur Mutlu,
Shahar Kvatinsky,
Teresa Serrano-Gotarredona,
Bernabe Linares-Barranco,
Sabina Spiga,
Sergey Savelev,
Alexander G Balanov,
Nitin Chawla,
Giuseppe Desoli,
Gerardo Malavena,
Christian Monzio Compagnoni,
Zhongrui Wang,
J Joshua Yang,
Ghazi Sarwat Syed,
Abu Sebastian,
Thomas Mikolajick,
Beatriz Noheda,
Stefan Slesazeck,
Bernard Dieny,
Tuo-Hung,
Hou,
Akhil Varri
, et al. (28 additional authors not shown)
Abstract:
The roadmap is organized into several thematic sections, outlining current computing challenges, discussing the neuromorphic computing approach, analyzing mature and currently utilized technologies, providing an overview of emerging technologies, addressing material challenges, exploring novel computing concepts, and finally examining the maturity level of emerging technologies while determining t…
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The roadmap is organized into several thematic sections, outlining current computing challenges, discussing the neuromorphic computing approach, analyzing mature and currently utilized technologies, providing an overview of emerging technologies, addressing material challenges, exploring novel computing concepts, and finally examining the maturity level of emerging technologies while determining the next essential steps for their advancement.
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Submitted 5 July, 2024; v1 submitted 2 July, 2024;
originally announced July 2024.
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Versatile CMOS Analog LIF Neuron for Memristor-Integrated Neuromorphic Circuits
Authors:
Nikhil Garg,
Davide Florini,
Patrick Dufour,
Eloir Muhr,
Mathieu Faye,
Marc Bocquet,
Damien Querlioz,
Yann Beilliard,
Dominique Drouin,
Fabien Alibart,
Jean-Michel Portal
Abstract:
Heterogeneous systems with analog CMOS circuits integrated with nanoscale memristive devices enable efficient deployment of neural networks on neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal dynamics by operating with extremely low current levels. Nevertheless, the current read from the memristive synapses can be higher by several orders of magnitude, and performing…
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Heterogeneous systems with analog CMOS circuits integrated with nanoscale memristive devices enable efficient deployment of neural networks on neuromorphic hardware. CMOS Neuron with low footprint can emulate slow temporal dynamics by operating with extremely low current levels. Nevertheless, the current read from the memristive synapses can be higher by several orders of magnitude, and performing impedance matching between neurons and synapses is mandatory. In this paper, we implement an analog leaky integrate and fire (LIF) neuron with a voltage regulator and current attenuator for interfacing CMOS neurons with memristive synapses. In addition, the neuron design proposes a dual leakage that could enable the implementation of local learning rules such as voltage-dependent synaptic plasticity. We also propose a connection scheme to implement adaptive LIF neurons based on two-neuron interaction. The proposed circuits can be used to interface with a variety of synaptic devices and process signals of diverse temporal dynamics.
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Submitted 28 June, 2024;
originally announced June 2024.
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The Logarithmic Memristor-Based Bayesian Machine
Authors:
Clément Turck,
Kamel-Eddine Harabi,
Adrien Pontlevy,
Théo Ballet,
Tifenn Hirtzlin,
Elisa Vianello,
Raphaël Laurent,
Jacques Droulez,
Pierre Bessière,
Marc Bocquet,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The demand for explainable and energy-efficient artificial intelligence (AI) systems for edge computing has led to significant interest in electronic systems dedicated to Bayesian inference. Traditional designs of such systems often rely on stochastic computing, which offers high energy efficiency but suffers from latency issues and struggles with low-probability values. In this paper, we introduc…
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The demand for explainable and energy-efficient artificial intelligence (AI) systems for edge computing has led to significant interest in electronic systems dedicated to Bayesian inference. Traditional designs of such systems often rely on stochastic computing, which offers high energy efficiency but suffers from latency issues and struggles with low-probability values. In this paper, we introduce the logarithmic memristor-based Bayesian machine, an innovative design that leverages the unique properties of memristors and logarithmic computing as an alternative to stochastic computing. We present a prototype machine fabricated in a hybrid CMOS/hafnium-oxide memristor process. We validate the versatility and robustness of our system through experimental validation and extensive simulations in two distinct applications: gesture recognition and sleep stage classification. The logarithmic approach simplifies the computational model by converting multiplications into additions and enhances the handling of low-probability events, which are crucial in time-dependent tasks. Our results demonstrate that the logarithmic Bayesian machine achieves superior performance in terms of accuracy and energy efficiency compared to its stochastic counterpart, particularly in scenarios involving complex probabilistic models. This work paves the way for the deployment of advanced AI capabilities in edge devices, where power efficiency and reliability are paramount.
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Submitted 5 June, 2024;
originally announced June 2024.
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Unsupervised End-to-End Training with a Self-Defined Target
Authors:
Dongshu Liu,
Jérémie Laydevant,
Adrien Pontlevy,
Damien Querlioz,
Julie Grollier
Abstract:
Designing algorithms for versatile AI hardware that can learn on the edge using both labeled and unlabeled data is challenging. Deep end-to-end training methods incorporating phases of self-supervised and supervised learning are accurate and adaptable to input data but self-supervised learning requires even more computational and memory resources than supervised learning, too high for current embe…
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Designing algorithms for versatile AI hardware that can learn on the edge using both labeled and unlabeled data is challenging. Deep end-to-end training methods incorporating phases of self-supervised and supervised learning are accurate and adaptable to input data but self-supervised learning requires even more computational and memory resources than supervised learning, too high for current embedded hardware. Conversely, unsupervised layer-by-layer training, such as Hebbian learning, is more compatible with existing hardware but does not integrate well with supervised learning. To address this, we propose a method enabling networks or hardware designed for end-to-end supervised learning to also perform high-performance unsupervised learning by adding two simple elements to the output layer: Winner-Take-All (WTA) selectivity and homeostasis regularization. These mechanisms introduce a "self-defined target" for unlabeled data, allowing purely unsupervised training for both fully-connected and convolutional layers using backpropagation or equilibrium propagation on datasets like MNIST (up to 99.2%), Fashion-MNIST (up to 90.3%), and SVHN (up to 81.5%). We extend this method to semi-supervised learning, adjusting targets based on data type, achieving 96.6% accuracy with only 600 labeled MNIST samples in a multi-layer perceptron. Our results show that this approach can effectively enable networks and hardware initially dedicated to supervised learning to also perform unsupervised learning, adapting to varying availability of labeled data.
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Submitted 21 November, 2024; v1 submitted 18 March, 2024;
originally announced March 2024.
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Bayesian Metaplasticity from Synaptic Uncertainty
Authors:
Djohan Bonnet,
Tifenn Hirtzlin,
Tarcisius Januel,
Thomas Dalgaty,
Damien Querlioz,
Elisa Vianello
Abstract:
Catastrophic forgetting remains a challenge for neural networks, especially in lifelong learning scenarios. In this study, we introduce MEtaplasticity from Synaptic Uncertainty (MESU), inspired by metaplasticity and Bayesian inference principles. MESU harnesses synaptic uncertainty to retain information over time, with its update rule closely approximating the diagonal Newton's method for synaptic…
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Catastrophic forgetting remains a challenge for neural networks, especially in lifelong learning scenarios. In this study, we introduce MEtaplasticity from Synaptic Uncertainty (MESU), inspired by metaplasticity and Bayesian inference principles. MESU harnesses synaptic uncertainty to retain information over time, with its update rule closely approximating the diagonal Newton's method for synaptic updates. Through continual learning experiments on permuted MNIST tasks, we demonstrate MESU's remarkable capability to maintain learning performance across 100 tasks without the need of explicit task boundaries.
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Submitted 15 December, 2023;
originally announced December 2023.
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Control of the magnetic anisotropy in multi-repeat Pt/Co/Al heterostructures using magneto-ionic gating
Authors:
Tristan da Câmara Santa Clara Gomes,
Tanvi Bhatnagar-Schöffmann,
Sachin Krishnia,
Yanis Sassi,
Dedalo Sanz-Hernández,
Nicolas Reyren,
Marie-Blandine Martin,
Frederic Brunnett,
Sophie Collin,
Florian Godel,
Shimpei Ono,
Damien Querlioz,
Dafiné Ravelosona,
Vincent Cros,
Julie Grollier,
Pierre Seneor,
Liza Herrera Diez
Abstract:
Controlling magnetic properties through the application of an electric field is a significant challenge in modern nanomagnetism. In this study, we investigate the magneto-ionic control of magnetic anisotropy in the topmost Co layer in Ta/Pt/[Co/Al/Pt]$_n$/Co/Al/AlO$_\text{x}$ multilayer stacks comprising $n +1$ Co layers and its impact on the magnetic properties of the multilayers. We demonstrate…
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Controlling magnetic properties through the application of an electric field is a significant challenge in modern nanomagnetism. In this study, we investigate the magneto-ionic control of magnetic anisotropy in the topmost Co layer in Ta/Pt/[Co/Al/Pt]$_n$/Co/Al/AlO$_\text{x}$ multilayer stacks comprising $n +1$ Co layers and its impact on the magnetic properties of the multilayers. We demonstrate that the perpendicular magnetic anisotropy can be reversibly quenched through gate-driven oxidation of the intermediary Al layer between Co and AlO$_\text{x}$, enabling dynamic control of the magnetic layers contributing to the out-of-plane remanence - varying between $n$ and $n +1$. For multilayer configurations with $n = 2$ and $n = 4$, we observe reversible and non-volatile additions of 1/3 and 1/5, respectively, to the anomalous Hall effect amplitude based on the applied gate voltage. Magnetic imaging reveals that the gate-induced spin-reorientation transition occurs through the propagation of a single 90$^{\circ}$ magnetic domain wall separating the perpendicular and in-plane anisotropy states. In the 5-repetition multilayer, the modification leads to a doubling of the period of the magnetic domains at remanence. These results demonstrate that the magneto-ionic control of the anisotropy of a single magnetic layer can be used to control the magnetic properties of coupled multilayer systems, extending beyond the gating effects on a single magnetic layer.
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Submitted 23 July, 2024; v1 submitted 2 October, 2023;
originally announced October 2023.
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Synaptic metaplasticity with multi-level memristive devices
Authors:
Simone D'Agostino,
Filippo Moro,
Tifenn Hirtzlin,
Julien Arcamone,
Niccolò Castellani,
Damien Querlioz,
Melika Payvand,
Elisa Vianello
Abstract:
Deep learning has made remarkable progress in various tasks, surpassing human performance in some cases. However, one drawback of neural networks is catastrophic forgetting, where a network trained on one task forgets the solution when learning a new one. To address this issue, recent works have proposed solutions based on Binarized Neural Networks (BNNs) incorporating metaplasticity. In this work…
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Deep learning has made remarkable progress in various tasks, surpassing human performance in some cases. However, one drawback of neural networks is catastrophic forgetting, where a network trained on one task forgets the solution when learning a new one. To address this issue, recent works have proposed solutions based on Binarized Neural Networks (BNNs) incorporating metaplasticity. In this work, we extend this solution to quantized neural networks (QNNs) and present a memristor-based hardware solution for implementing metaplasticity during both inference and training. We propose a hardware architecture that integrates quantized weights in memristor devices programmed in an analog multi-level fashion with a digital processing unit for high-precision metaplastic storage. We validated our approach using a combined software framework and memristor based crossbar array for in-memory computing fabricated in 130 nm CMOS technology. Our experimental results show that a two-layer perceptron achieves 97% and 86% accuracy on consecutive training of MNIST and Fashion-MNIST, equal to software baseline. This result demonstrates immunity to catastrophic forgetting and the resilience to analog device imperfections of the proposed solution. Moreover, our architecture is compatible with the memristor limited endurance and has a 15x reduction in memory
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Submitted 21 June, 2023;
originally announced June 2023.
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Powering AI at the Edge: A Robust, Memristor-based Binarized Neural Network with Near-Memory Computing and Miniaturized Solar Cell
Authors:
Fadi Jebali,
Atreya Majumdar,
Clément Turck,
Kamel-Eddine Harabi,
Mathieu-Coumba Faye,
Eloi Muhr,
Jean-Pierre Walder,
Oleksandr Bilousov,
Amadeo Michaud,
Elisa Vianello,
Tifenn Hirtzlin,
François Andrieu,
Marc Bocquet,
Stéphane Collin,
Damien Querlioz,
Jean-Michel Portal
Abstract:
Memristor-based neural networks provide an exceptional energy-efficient platform for artificial intelligence (AI), presenting the possibility of self-powered operation when paired with energy harvesters. However, most memristor-based networks rely on analog in-memory computing, necessitating a stable and precise power supply, which is incompatible with the inherently unstable and unreliable energy…
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Memristor-based neural networks provide an exceptional energy-efficient platform for artificial intelligence (AI), presenting the possibility of self-powered operation when paired with energy harvesters. However, most memristor-based networks rely on analog in-memory computing, necessitating a stable and precise power supply, which is incompatible with the inherently unstable and unreliable energy harvesters. In this work, we fabricated a robust binarized neural network comprising 32,768 memristors, powered by a miniature wide-bandgap solar cell optimized for edge applications. Our circuit employs a resilient digital near-memory computing approach, featuring complementarily programmed memristors and logic-in-sense-amplifier. This design eliminates the need for compensation or calibration, operating effectively under diverse conditions. Under high illumination, the circuit achieves inference performance comparable to that of a lab bench power supply. In low illumination scenarios, it remains functional with slightly reduced accuracy, seamlessly transitioning to an approximate computing mode. Through image classification neural network simulations, we demonstrate that misclassified images under low illumination are primarily difficult-to-classify cases. Our approach lays the groundwork for self-powered AI and the creation of intelligent sensors for various applications in health, safety, and environment monitoring.
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Submitted 22 May, 2023;
originally announced May 2023.
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A Multimode Hybrid Memristor-CMOS Prototyping Platform Supporting Digital and Analog Projects
Authors:
Kamel-Eddine Harabi,
Clement Turck,
Marie Drouhin,
Adrien Renaudineau,
Thomas Bersani--Veroni,
Damien Querlioz,
Tifenn Hirtzlin,
Elisa Vianello,
Marc Bocquet,
Jean-Michel Portal
Abstract:
We present an integrated circuit fabricated in a process co-integrating CMOS and hafnium-oxide memristor technology, which provides a prototyping platform for projects involving memristors. Our circuit includes the periphery circuitry for using memristors within digital circuits, as well as an analog mode with direct access to memristors. The platform allows optimizing the conditions for reading a…
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We present an integrated circuit fabricated in a process co-integrating CMOS and hafnium-oxide memristor technology, which provides a prototyping platform for projects involving memristors. Our circuit includes the periphery circuitry for using memristors within digital circuits, as well as an analog mode with direct access to memristors. The platform allows optimizing the conditions for reading and writing memristors, as well as developing and testing innovative memristor-based neuromorphic concepts.
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Submitted 28 February, 2023;
originally announced February 2023.
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Multilayer spintronic neural networks with radio-frequency connections
Authors:
Andrew Ross,
Nathan Leroux,
Arnaud de Riz,
Danijela Marković,
Dédalo Sanz-Hernández,
Juan Trastoy,
Paolo Bortolotti,
Damien Querlioz,
Leandro Martins,
Luana Benetti,
Marcel S. Claro,
Pedro Anacleto,
Alejandro Schulman,
Thierry Taris,
Jean-Baptiste Begueret,
Sylvain Saïghi,
Alex S. Jenkins,
Ricardo Ferreira,
Adrien F. Vincent,
Alice Mizrahi,
Julie Grollier
Abstract:
Spintronic nano-synapses and nano-neurons perform complex cognitive computations with high accuracy thanks to their rich, reproducible and controllable magnetization dynamics. These dynamical nanodevices could transform artificial intelligence hardware, provided that they implement state-of-the art deep neural networks. However, there is today no scalable way to connect them in multilayers. Here w…
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Spintronic nano-synapses and nano-neurons perform complex cognitive computations with high accuracy thanks to their rich, reproducible and controllable magnetization dynamics. These dynamical nanodevices could transform artificial intelligence hardware, provided that they implement state-of-the art deep neural networks. However, there is today no scalable way to connect them in multilayers. Here we show that the flagship nano-components of spintronics, magnetic tunnel junctions, can be connected into multilayer neural networks where they implement both synapses and neurons thanks to their magnetization dynamics, and communicate by processing, transmitting and receiving radio frequency (RF) signals. We build a hardware spintronic neural network composed of nine magnetic tunnel junctions connected in two layers, and show that it natively classifies nonlinearly-separable RF inputs with an accuracy of 97.7%. Using physical simulations, we demonstrate that a large network of nanoscale junctions can achieve state-of the-art identification of drones from their RF transmissions, without digitization, and consuming only a few milliwatts, which is a gain of more than four orders of magnitude in power consumption compared to currently used techniques. This study lays the foundation for deep, dynamical, spintronic neural networks.
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Submitted 7 November, 2022;
originally announced November 2022.
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Characterization and modeling of spiking and bursting in experimental NbOx neuron
Authors:
Marie Drouhin,
Shuai Li,
Matthieu Grelier,
Sophie Collin,
Florian Godel,
Robert G. Elliman,
Bruno Dlubak,
Juan Trastoy,
Damien Querlioz,
Julie Grollier
Abstract:
Hardware spiking neural networks hold the promise of realizing artificial intelligence with high energy efficiency. In this context, solid-state and scalable memristors can be used to mimic biological neuron characteristics. However, these devices show limited neuronal behaviors and have to be integrated in more complex circuits to implement the rich dynamics of biological neurons. Here we studied…
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Hardware spiking neural networks hold the promise of realizing artificial intelligence with high energy efficiency. In this context, solid-state and scalable memristors can be used to mimic biological neuron characteristics. However, these devices show limited neuronal behaviors and have to be integrated in more complex circuits to implement the rich dynamics of biological neurons. Here we studied a NbOx memristor neuron that is capable of emulating numerous neuronal dynamics, including tonic spiking, stochastic spiking, leaky-integrate-and-fire features, spike latency, temporal integration. The device also exhibits phasic bursting, a property that has scarcely been observed and studied in solid-state nano-neurons. We show that we can reproduce and understand this particular response through simulations using non-linear dynamics. These results show that a single NbOx device is sufficient to emulate a collection of rich neuronal dynamics that paves a path forward for realizing scalable and energy-efficient neuromorphic computing paradigms.
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Submitted 1 September, 2022;
originally announced September 2022.
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Voltage-Dependent Synaptic Plasticity (VDSP): Unsupervised probabilistic Hebbian plasticity rule based on neurons membrane potential
Authors:
Nikhil Garg,
Ismael Balafrej,
Terrence C. Stewart,
Jean Michel Portal,
Marc Bocquet,
Damien Querlioz,
Dominique Drouin,
Jean Rouat,
Yann Beilliard,
Fabien Alibart
Abstract:
This study proposes voltage-dependent-synaptic plasticity (VDSP), a novel brain-inspired unsupervised local learning rule for the online implementation of Hebb's plasticity mechanism on neuromorphic hardware. The proposed VDSP learning rule updates the synaptic conductance on the spike of the postsynaptic neuron only, which reduces by a factor of two the number of updates with respect to standard…
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This study proposes voltage-dependent-synaptic plasticity (VDSP), a novel brain-inspired unsupervised local learning rule for the online implementation of Hebb's plasticity mechanism on neuromorphic hardware. The proposed VDSP learning rule updates the synaptic conductance on the spike of the postsynaptic neuron only, which reduces by a factor of two the number of updates with respect to standard spike-timing-dependent plasticity (STDP). This update is dependent on the membrane potential of the presynaptic neuron, which is readily available as part of neuron implementation and hence does not require additional memory for storage. Moreover, the update is also regularized on synaptic weight and prevents explosion or vanishing of weights on repeated stimulation. Rigorous mathematical analysis is performed to draw an equivalence between VDSP and STDP. To validate the system-level performance of VDSP, we train a single-layer spiking neural network (SNN) for the recognition of handwritten digits. We report 85.01 $ \pm $ 0.76% (Mean $ \pm $ S.D.) accuracy for a network of 100 output neurons on the MNIST dataset. The performance improves when scaling the network size (89.93 $ \pm $ 0.41% for 400 output neurons, 90.56 $ \pm $ 0.27 for 500 neurons), which validates the applicability of the proposed learning rule for spatial pattern recognition tasks. Future work will consider more complicated tasks. Interestingly, the learning rule better adapts than STDP to the frequency of input signal and does not require hand-tuning of hyperparameters
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Submitted 22 October, 2022; v1 submitted 21 March, 2022;
originally announced March 2022.
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Experimental demonstration of Single-Level and Multi-Level-Cell RRAM-based In-Memory Computing with up to 16 parallel operations
Authors:
E. Esmanhotto,
T. Hirtzlin,
N. Castellani,
S. Martin,
B. Giraud,
F. Andrieu,
J. F. Nodin,
D. Querlioz,
J-M. Portal,
E. Vianello
Abstract:
Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device imperfection and device endurance have yet to be overcome. In this work, we demonstrate experimentally an RRAM-based IMC logic concept with strong resilience to RRAM variability, even after one million endurance cycles. Our work relies on a gener…
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Crossbar arrays of resistive memories (RRAM) hold the promise of enabling In-Memory Computing (IMC), but essential challenges due to the impact of device imperfection and device endurance have yet to be overcome. In this work, we demonstrate experimentally an RRAM-based IMC logic concept with strong resilience to RRAM variability, even after one million endurance cycles. Our work relies on a generalization of the concept of in-memory Scouting Logic, and we demonstrate it experimentally with up to 16 parallel devices (operands), a new milestone for RRAM in-memory logic. Moreover, we combine IMC with Multi-Level-Cell programming and demonstrate experimentally, for the first time, an IMC RRAM-based MLC 2-bit adder.
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Submitted 3 March, 2022;
originally announced March 2022.
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A Memristor-Based Bayesian Machine
Authors:
Kamel-Eddine Harabi,
Tifenn Hirtzlin,
Clément Turck,
Elisa Vianello,
Raphaël Laurent,
Jacques Droulez,
Pierre Bessière,
Jean-Michel Portal,
Marc Bocquet,
Damien Querlioz
Abstract:
In recent years, a considerable research effort has shown the energy benefits of implementing neural networks with memristors or other emerging memory technologies. However, for extreme-edge applications with high uncertainty, access to reduced amounts of data, and where explainable decisions are required, neural networks may not provide an acceptable form of intelligence. Bayesian reasoning can s…
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In recent years, a considerable research effort has shown the energy benefits of implementing neural networks with memristors or other emerging memory technologies. However, for extreme-edge applications with high uncertainty, access to reduced amounts of data, and where explainable decisions are required, neural networks may not provide an acceptable form of intelligence. Bayesian reasoning can solve these concerns, but it is computationally expensive and, unlike neural networks, does not translate naturally to memristor-based architectures. In this work, we introduce, demonstrate experimentally on a fully fabricated hybrid CMOS-memristor system, and analyze a Bayesian machine designed for highly-energy efficient Bayesian reasoning. The architecture of the machine is obtained by writing Bayes' law in a way making its implementation natural by the principles of distributed memory and stochastic computing, allowing the circuit to function using solely local memory and minimal data movement. Measurements on a fabricated small-scale Bayesian machine featuring 2,048 memristors and 30,080 transistors show the viability of this approach and the possibility of overcoming the challenges associated with its design: the inherent imperfections of memristors, as well as the need to distribute very locally higher-than-nominal supply voltages. The design of a scaled-up version of the machine shows its outstanding energy efficiency on a real-life gesture recognition task: a gesture can be recognized using 5,000 times less energy than using a microcontroller unit. The Bayesian machine also features several desirable features, e.g., instant on/off operation, compatibility with low supply voltages, and resilience to single-event upsets. These results open the road for Bayesian reasoning as an attractive way for energy-efficient, robust, and explainable intelligence at the edge.
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Submitted 20 December, 2021;
originally announced December 2021.
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Spintronic memristors for computing
Authors:
Qiming Shao,
Zhongrui Wang,
Yan Zhou,
Shunsuke Fukami,
Damien Querlioz,
Leon O. Chua
Abstract:
The ever-increasing amount of data from ubiquitous smart devices fosters data-centric and cognitive algorithms. Traditional digital computer systems have separate logic and memory units, resulting in a huge delay and energy cost for implementing these algorithms. Memristors are programmable resistors with a memory, providing a paradigm-shifting approach towards creating intelligent hardware system…
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The ever-increasing amount of data from ubiquitous smart devices fosters data-centric and cognitive algorithms. Traditional digital computer systems have separate logic and memory units, resulting in a huge delay and energy cost for implementing these algorithms. Memristors are programmable resistors with a memory, providing a paradigm-shifting approach towards creating intelligent hardware systems to handle data-centric tasks. Spintronic nanodevices are promising choices as they are high-speed, low-power, highly scalable, robust, and capable of constructing dynamic complex systems. In this Review, we survey spintronic devices from a memristor point of view. We introduce spintronic memristors based on magnetic tunnel junctions, nanomagnet ensemble, domain walls, topological spin textures, and spin waves, which represent dramatically different state spaces. They can exhibit steady, oscillatory, stochastic, and chaotic trajectories in their state spaces, which have been exploited for in-memory logic, neuromorphic computing, stochastic and chaos computing. Finally, we discuss challenges and trends in realizing large-scale spintronic memristive systems for practical applications.
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Submitted 14 March, 2025; v1 submitted 6 December, 2021;
originally announced December 2021.
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Energy Efficient Learning with Low Resolution Stochastic Domain Wall Synapse Based Deep Neural Networks
Authors:
Walid A. Misba,
Mark Lozano,
Damien Querlioz,
Jayasimha Atulasimha
Abstract:
We demonstrate that extremely low resolution quantized (nominally 5-state) synapses with large stochastic variations in Domain Wall (DW) position can be both energy efficient and achieve reasonably high testing accuracies compared to Deep Neural Networks (DNNs) of similar sizes using floating precision synaptic weights. Specifically, voltage controlled DW devices demonstrate stochastic behavior as…
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We demonstrate that extremely low resolution quantized (nominally 5-state) synapses with large stochastic variations in Domain Wall (DW) position can be both energy efficient and achieve reasonably high testing accuracies compared to Deep Neural Networks (DNNs) of similar sizes using floating precision synaptic weights. Specifically, voltage controlled DW devices demonstrate stochastic behavior as modeled rigorously with micromagnetic simulations and can only encode limited states; however, they can be extremely energy efficient during both training and inference. We show that by implementing suitable modifications to the learning algorithms, we can address the stochastic behavior as well as mitigate the effect of their low-resolution to achieve high testing accuracies. In this study, we propose both in-situ and ex-situ training algorithms, based on modification of the algorithm proposed by Hubara et al. [1] which works well with quantization of synaptic weights. We train several 5-layer DNNs on MNIST dataset using 2-, 3- and 5-state DW device as synapse. For in-situ training, a separate high precision memory unit is adopted to preserve and accumulate the weight gradients, which are then quantized to program the low precision DW devices. Moreover, a sizeable noise tolerance margin is used during the training to address the intrinsic programming noise. For ex-situ training, a precursor DNN is first trained based on the characterized DW device model and a noise tolerance margin, which is similar to the in-situ training. Remarkably, for in-situ inference the energy dissipation to program the devices is only 13 pJ per inference given that the training is performed over the entire MNIST dataset for 10 epochs.
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Submitted 14 November, 2021;
originally announced November 2021.
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Forecasting the outcome of spintronic experiments with Neural Ordinary Differential Equations
Authors:
Xing Chen,
Flavio Abreu Araujo,
Mathieu Riou,
Jacob Torrejon,
Dafiné Ravelosona,
Wang Kang,
Weisheng Zhao,
Julie Grollier,
Damien Querlioz
Abstract:
Deep learning has an increasing impact to assist research, allowing, for example, the discovery of novel materials. Until now, however, these artificial intelligence techniques have fallen short of discovering the full differential equation of an experimental physical system. Here we show that a dynamical neural network, trained on a minimal amount of data, can predict the behavior of spintronic d…
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Deep learning has an increasing impact to assist research, allowing, for example, the discovery of novel materials. Until now, however, these artificial intelligence techniques have fallen short of discovering the full differential equation of an experimental physical system. Here we show that a dynamical neural network, trained on a minimal amount of data, can predict the behavior of spintronic devices with high accuracy and an extremely efficient simulation time, compared to the micromagnetic simulations that are usually employed to model them. For this purpose, we re-frame the formalism of Neural Ordinary Differential Equations (ODEs) to the constraints of spintronics: few measured outputs, multiple inputs and internal parameters. We demonstrate with Spin-Neural ODEs an acceleration factor over 200 compared to micromagnetic simulations for a complex problem -- the simulation of a reservoir computer made of magnetic skyrmions (20 minutes compared to three days). In a second realization, we show that we can predict the noisy response of experimental spintronic nano-oscillators to varying inputs after training Spin-Neural ODEs on five milliseconds of their measured response to different excitations. Spin-Neural ODE is a disruptive tool for developing spintronic applications in complement to micromagnetic simulations, which are time-consuming and cannot fit experiments when noise or imperfections are present. Spin-Neural ODE can also be generalized to other electronic devices involving dynamics.
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Submitted 23 July, 2021;
originally announced August 2021.
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Model of the Weak Reset Process in HfOx Resistive Memory for Deep Learning Frameworks
Authors:
Atreya Majumdar,
Marc Bocquet,
Tifenn Hirtzlin,
Axel Laborieux,
Jacques-Olivier Klein,
Etienne Nowak,
Elisa Vianello,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The implementation of current deep learning training algorithms is power-hungry, owing to data transfer between memory and logic units. Oxide-based RRAMs are outstanding candidates to implement in-memory computing, which is less power-intensive. Their weak RESET regime, is particularly attractive for learning, as it allows tuning the resistance of the devices with remarkable endurance. However, th…
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The implementation of current deep learning training algorithms is power-hungry, owing to data transfer between memory and logic units. Oxide-based RRAMs are outstanding candidates to implement in-memory computing, which is less power-intensive. Their weak RESET regime, is particularly attractive for learning, as it allows tuning the resistance of the devices with remarkable endurance. However, the resistive change behavior in this regime suffers many fluctuations and is particularly challenging to model, especially in a way compatible with tools used for simulating deep learning. In this work, we present a model of the weak RESET process in hafnium oxide RRAM and integrate this model within the PyTorch deep learning framework. Validated on experiments on a hybrid CMOS/RRAM technology, our model reproduces both the noisy progressive behavior and the device-to-device (D2D) variability. We use this tool to train Binarized Neural Networks for the MNIST handwritten digit recognition task and the CIFAR-10 object classification task. We simulate our model with and without various aspects of device imperfections to understand their impact on the training process and identify that the D2D variability is the most detrimental aspect. The framework can be used in the same manner for other types of memories to identify the device imperfections that cause the most degradation, which can, in turn, be used to optimize the devices to reduce the impact of these imperfections.
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Submitted 2 September, 2021; v1 submitted 2 July, 2021;
originally announced July 2021.
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Training Dynamical Binary Neural Networks with Equilibrium Propagation
Authors:
Jérémie Laydevant,
Maxence Ernoult,
Damien Querlioz,
Julie Grollier
Abstract:
Equilibrium Propagation (EP) is an algorithm intrinsically adapted to the training of physical networks, thanks to the local updates of weights given by the internal dynamics of the system. However, the construction of such a hardware requires to make the algorithm compatible with existing neuromorphic CMOS technologies, which generally exploit digital communication between neurons and offer a lim…
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Equilibrium Propagation (EP) is an algorithm intrinsically adapted to the training of physical networks, thanks to the local updates of weights given by the internal dynamics of the system. However, the construction of such a hardware requires to make the algorithm compatible with existing neuromorphic CMOS technologies, which generally exploit digital communication between neurons and offer a limited amount of local memory. In this work, we demonstrate that EP can train dynamical networks with binary activations and weights. We first train systems with binary weights and full-precision activations, achieving an accuracy equivalent to that of full-precision models trained by standard EP on MNIST, and losing only 1.9% accuracy on CIFAR-10 with equal architecture. We then extend our method to the training of models with binary activations and weights on MNIST, achieving an accuracy within 1% of the full-precision reference for fully connected architectures and reaching the full-precision accuracy for convolutional architectures. Our extension of EP to binary networks opens new solutions for on-chip learning and provides a compact framework for training BNNs end-to-end with the same circuitry as for inference.
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Submitted 19 April, 2021; v1 submitted 16 March, 2021;
originally announced March 2021.
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Synaptic metaplasticity in binarized neural networks
Authors:
Axel Laborieux,
Maxence Ernoult,
Tifenn Hirtzlin,
Damien Querlioz
Abstract:
Unlike the brain, artificial neural networks, including state-of-the-art deep neural networks for computer vision, are subject to "catastrophic forgetting": they rapidly forget the previous task when trained on a new one. Neuroscience suggests that biological synapses avoid this issue through the process of synaptic consolidation and metaplasticity: the plasticity itself changes upon repeated syna…
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Unlike the brain, artificial neural networks, including state-of-the-art deep neural networks for computer vision, are subject to "catastrophic forgetting": they rapidly forget the previous task when trained on a new one. Neuroscience suggests that biological synapses avoid this issue through the process of synaptic consolidation and metaplasticity: the plasticity itself changes upon repeated synaptic events. In this work, we show that this concept of metaplasticity can be transferred to a particular type of deep neural networks, binarized neural networks, to reduce catastrophic forgetting.
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Submitted 19 January, 2021;
originally announced January 2021.
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Scaling Equilibrium Propagation to Deep ConvNets by Drastically Reducing its Gradient Estimator Bias
Authors:
Axel Laborieux,
Maxence Ernoult,
Benjamin Scellier,
Yoshua Bengio,
Julie Grollier,
Damien Querlioz
Abstract:
Equilibrium Propagation (EP) is a biologically-inspired counterpart of Backpropagation Through Time (BPTT) which, owing to its strong theoretical guarantees and the locality in space of its learning rule, fosters the design of energy-efficient hardware dedicated to learning. In practice, however, EP does not scale to visual tasks harder than MNIST. In this work, we show that a bias in the gradient…
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Equilibrium Propagation (EP) is a biologically-inspired counterpart of Backpropagation Through Time (BPTT) which, owing to its strong theoretical guarantees and the locality in space of its learning rule, fosters the design of energy-efficient hardware dedicated to learning. In practice, however, EP does not scale to visual tasks harder than MNIST. In this work, we show that a bias in the gradient estimate of EP, inherent in the use of finite nudging, is responsible for this phenomenon and that cancelling it allows training deep ConvNets by EP, including architectures with distinct forward and backward connections. These results highlight EP as a scalable approach to compute error gradients in deep neural networks, thereby motivating its hardware implementation.
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Submitted 14 January, 2021;
originally announced January 2021.
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Radio-Frequency Multiply-And-Accumulate Operations with Spintronic Synapses
Authors:
N. Leroux,
D. Marković,
E. Martin,
T. Petrisor,
D. Querlioz,
A. Mizrahi,
J. Grollier
Abstract:
Exploiting the physics of nanoelectronic devices is a major lead for implementing compact, fast, and energy efficient artificial intelligence. In this work, we propose an original road in this direction, where assemblies of spintronic resonators used as artificial synapses can classify an-alogue radio-frequency signals directly without digitalization. The resonators convert the ra-dio-frequency in…
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Exploiting the physics of nanoelectronic devices is a major lead for implementing compact, fast, and energy efficient artificial intelligence. In this work, we propose an original road in this direction, where assemblies of spintronic resonators used as artificial synapses can classify an-alogue radio-frequency signals directly without digitalization. The resonators convert the ra-dio-frequency input signals into direct voltages through the spin-diode effect. In the process, they multiply the input signals by a synaptic weight, which depends on their resonance fre-quency. We demonstrate through physical simulations with parameters extracted from exper-imental devices that frequency-multiplexed assemblies of resonators implement the corner-stone operation of artificial neural networks, the Multiply-And-Accumulate (MAC), directly on microwave inputs. The results show that even with a non-ideal realistic model, the outputs obtained with our architecture remain comparable to that of a traditional MAC operation. Us-ing a conventional machine learning framework augmented with equations describing the physics of spintronic resonators, we train a single layer neural network to classify radio-fre-quency signals encoding 8x8 pixel handwritten digits pictures. The spintronic neural network recognizes the digits with an accuracy of 99.96 %, equivalent to purely software neural net-works. This MAC implementation offers a promising solution for fast, low-power radio-fre-quency classification applications, and a new building block for spintronic deep neural net-works.
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Submitted 5 April, 2021; v1 submitted 16 November, 2020;
originally announced November 2020.
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Tunable stochasticity in an artificial spin network
Authors:
Dédalo Sanz-Hernández,
Maryam Massouras,
Nicolas Reyren,
Nicolas Rougemaille,
Vojtěch Schánilec,
Karim Bouzehouane,
Michel Hehn,
Benjamin Canals,
Damien Querlioz,
Julie Grollier,
François Montaigne,
Daniel Lacour
Abstract:
Metamaterials present the possibility of artificially generating advanced functionalities through engineering of their internal structure. Artificial spin networks, in which a large number of nanoscale magnetic elements are coupled together, are promising metamaterial candidates that enable the control of collective magnetic behavior through tuning of the local interaction between elements. In thi…
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Metamaterials present the possibility of artificially generating advanced functionalities through engineering of their internal structure. Artificial spin networks, in which a large number of nanoscale magnetic elements are coupled together, are promising metamaterial candidates that enable the control of collective magnetic behavior through tuning of the local interaction between elements. In this work, the motion of magnetic domain-walls in an artificial spin network leads to a tunable stochastic response of the metamaterial, which can be tailored through an external magnetic field and local lattice modifications. This type of tunable stochastic network produces a controllable random response exploiting intrinsic stochasticity within magnetic domain-wall motion at the nanoscale. An iconic demonstration used to illustrate the control of randomness is the Galton board. In this system, multiple balls fall into an array of pegs to generate a bell-shaped curve that can be modified via the array spacing or the tilt of the board. A nanoscale recreation of this experiment using an artificial spin network is employed to demonstrate tunable stochasticity. This type of tunable stochastic network opens new paths towards post-Von Neumann computing architectures such as Bayesian sensing or random neural networks, in which stochasticity is harnessed to efficiently perform complex computational tasks.
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Submitted 4 February, 2021; v1 submitted 20 October, 2020;
originally announced October 2020.
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EqSpike: Spike-driven Equilibrium Propagation for Neuromorphic Implementations
Authors:
Erwann Martin,
Maxence Ernoult,
Jérémie Laydevant,
Shuai Li,
Damien Querlioz,
Teodora Petrisor,
Julie Grollier
Abstract:
Finding spike-based learning algorithms that can be implemented within the local constraints of neuromorphic systems, while achieving high accuracy, remains a formidable challenge. Equilibrium Propagation is a promising alternative to backpropagation as it only involves local computations, but hardware-oriented studies have so far focused on rate-based networks. In this work, we develop a spiking…
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Finding spike-based learning algorithms that can be implemented within the local constraints of neuromorphic systems, while achieving high accuracy, remains a formidable challenge. Equilibrium Propagation is a promising alternative to backpropagation as it only involves local computations, but hardware-oriented studies have so far focused on rate-based networks. In this work, we develop a spiking neural network algorithm called EqSpike, compatible with neuromorphic systems, which learns by Equilibrium Propagation. Through simulations, we obtain a test recognition accuracy of 97.6% on MNIST, similar to rate-based Equilibrium Propagation, and comparing favourably to alternative learning techniques for spiking neural networks. We show that EqSpike implemented in silicon neuromorphic technology could reduce the energy consumption of inference and training respectively by three orders and two orders of magnitude compared to GPUs. Finally, we also show that during learning, EqSpike weight updates exhibit a form of Spike Timing Dependent Plasticity, highlighting a possible connection with biology.
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Submitted 17 February, 2021; v1 submitted 15 October, 2020;
originally announced October 2020.
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Implementation of Ternary Weights with Resistive RAM Using a Single Sense Operation per Synapse
Authors:
Axel Laborieux,
Marc Bocquet,
Tifenn Hirtzlin,
Jacques-Olivier Klein,
Etienne Nowak,
Elisa Vianello,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a significant lead for reducing the energy consumption of artificial intelligence. To achieve maximum energy efficiency in such systems, logic and memory should be integrated as tightly as possible. In this work, we focus on the case of ternary neural networks, w…
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The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a significant lead for reducing the energy consumption of artificial intelligence. To achieve maximum energy efficiency in such systems, logic and memory should be integrated as tightly as possible. In this work, we focus on the case of ternary neural networks, where synaptic weights assume ternary values. We propose a two-transistor/two-resistor memory architecture employing a precharge sense amplifier, where the weight value can be extracted in a single sense operation. Based on experimental measurements on a hybrid 130 nm CMOS/RRAM chip featuring this sense amplifier, we show that this technique is particularly appropriate at low supply voltage, and that it is resilient to process, voltage, and temperature variations. We characterize the bit error rate in our scheme. We show based on neural network simulation on the CIFAR-10 image recognition task that the use of ternary neural networks significantly increases neural network performance, with regards to binary ones, which are often preferred for inference hardware. We finally evidence that the neural network is immune to the type of bit errors observed in our scheme, which can therefore be used without error correction.
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Submitted 14 October, 2020; v1 submitted 26 July, 2020;
originally announced July 2020.
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Embracing the Unreliability of Memory Devices for Neuromorphic Computing
Authors:
Marc Bocquet,
Tifenn Hirtzlin,
Jacques-Olivier Klein,
Etienne Nowak,
Elisa Vianello,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability. Inspired by the architecture of animal brains, we present a manufactured differential hybrid CMOS/RRAM memory architecture suitable for neural network implement…
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The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability. Inspired by the architecture of animal brains, we present a manufactured differential hybrid CMOS/RRAM memory architecture suitable for neural network implementation that functions without formal ECC. We also show that using low-energy but error-prone programming conditions only slightly reduces network accuracy.
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Submitted 13 July, 2020;
originally announced July 2020.
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Spintronics for neuromorphic computing
Authors:
J. Grollier,
D. Querlioz,
K. Y. Camsari,
K. Everschor-Sitte,
S. Fukami,
M. D. Stiles
Abstract:
Neuromorphic computing uses brain-inspired principles to design circuits that can perform computational tasks with superior power efficiency to conventional computers. Approaches that use traditional electronic devices to create artificial neurons and synapses are, however, currently limited by the energy and area requirements of these components. Spintronic nanodevices, which exploit both the mag…
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Neuromorphic computing uses brain-inspired principles to design circuits that can perform computational tasks with superior power efficiency to conventional computers. Approaches that use traditional electronic devices to create artificial neurons and synapses are, however, currently limited by the energy and area requirements of these components. Spintronic nanodevices, which exploit both the magnetic and electrical properties of electrons, can increase the energy efficiency and decrease the area of these circuits, and magnetic tunnel junctions are of particular interest as neuromorphic computing elements because they are compatible with standard integrated circuits and can support multiple functionalities. Here we review the development of spintronic devices for neuromorphic computing. We examine how magnetic tunnel junctions can serve as synapses and neurons, and how magnetic textures, such as domain walls and skyrmions, can function as neurons. We also explore spintronics-based implementations of neuromorphic computing tasks, such as pattern recognition in an associative memory, and discuss the challenges that exist in scaling up these systems.
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Submitted 12 July, 2020;
originally announced July 2020.
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OvA-INN: Continual Learning with Invertible Neural Networks
Authors:
G. Hocquet,
O. Bichler,
D. Querlioz
Abstract:
In the field of Continual Learning, the objective is to learn several tasks one after the other without access to the data from previous tasks. Several solutions have been proposed to tackle this problem but they usually assume that the user knows which of the tasks to perform at test time on a particular sample, or rely on small samples from previous data and most of them suffer of a substantial…
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In the field of Continual Learning, the objective is to learn several tasks one after the other without access to the data from previous tasks. Several solutions have been proposed to tackle this problem but they usually assume that the user knows which of the tasks to perform at test time on a particular sample, or rely on small samples from previous data and most of them suffer of a substantial drop in accuracy when updated with batches of only one class at a time. In this article, we propose a new method, OvA-INN, which is able to learn one class at a time and without storing any of the previous data. To achieve this, for each class, we train a specific Invertible Neural Network to extract the relevant features to compute the likelihood on this class. At test time, we can predict the class of a sample by identifying the network which predicted the highest likelihood. With this method, we show that we can take advantage of pretrained models by stacking an Invertible Network on top of a feature extractor. This way, we are able to outperform state-of-the-art approaches that rely on features learning for the Continual Learning of MNIST and CIFAR-100 datasets. In our experiments, we reach 72% accuracy on CIFAR-100 after training our model one class at a time.
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Submitted 24 June, 2020;
originally announced June 2020.
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In-Memory Resistive RAM Implementation of Binarized Neural Networks for Medical Applications
Authors:
Bogdan Penkovsky,
Marc Bocquet,
Tifenn Hirtzlin,
Jacques-Olivier Klein,
Etienne Nowak,
Elisa Vianello,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The advent of deep learning has considerably accelerated machine learning development. The deployment of deep neural networks at the edge is however limited by their high memory and energy consumption requirements. With new memory technology available, emerging Binarized Neural Networks (BNNs) are promising to reduce the energy impact of the forthcoming machine learning hardware generation, enabli…
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The advent of deep learning has considerably accelerated machine learning development. The deployment of deep neural networks at the edge is however limited by their high memory and energy consumption requirements. With new memory technology available, emerging Binarized Neural Networks (BNNs) are promising to reduce the energy impact of the forthcoming machine learning hardware generation, enabling machine learning on the edge devices and avoiding data transfer over the network. In this work, after presenting our implementation employing a hybrid CMOS - hafnium oxide resistive memory technology, we suggest strategies to apply BNNs to biomedical signals such as electrocardiography and electroencephalography, keeping accuracy level and reducing memory requirements. We investigate the memory-accuracy trade-off when binarizing whole network and binarizing solely the classifier part. We also discuss how these results translate to the edge-oriented Mobilenet~V1 neural network on the Imagenet task. The final goal of this research is to enable smart autonomous healthcare devices.
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Submitted 20 June, 2020;
originally announced June 2020.
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Scaling Equilibrium Propagation to Deep ConvNets by Drastically Reducing its Gradient Estimator Bias
Authors:
Axel Laborieux,
Maxence Ernoult,
Benjamin Scellier,
Yoshua Bengio,
Julie Grollier,
Damien Querlioz
Abstract:
Equilibrium Propagation (EP) is a biologically-inspired algorithm for convergent RNNs with a local learning rule that comes with strong theoretical guarantees. The parameter updates of the neural network during the credit assignment phase have been shown mathematically to approach the gradients provided by Backpropagation Through Time (BPTT) when the network is infinitesimally nudged toward its ta…
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Equilibrium Propagation (EP) is a biologically-inspired algorithm for convergent RNNs with a local learning rule that comes with strong theoretical guarantees. The parameter updates of the neural network during the credit assignment phase have been shown mathematically to approach the gradients provided by Backpropagation Through Time (BPTT) when the network is infinitesimally nudged toward its target. In practice, however, training a network with the gradient estimates provided by EP does not scale to visual tasks harder than MNIST. In this work, we show that a bias in the gradient estimate of EP, inherent in the use of finite nudging, is responsible for this phenomenon and that cancelling it allows training deep ConvNets by EP. We show that this bias can be greatly reduced by using symmetric nudging (a positive nudging and a negative one). We also generalize previous EP equations to the case of cross-entropy loss (by opposition to squared error). As a result of these advances, we are able to achieve a test error of 11.7% on CIFAR-10 by EP, which approaches the one achieved by BPTT and provides a major improvement with respect to the standard EP approach with same-sign nudging that gives 86% test error. We also apply these techniques to train an architecture with asymmetric forward and backward connections, yielding a 13.2% test error. These results highlight EP as a compelling biologically-plausible approach to compute error gradients in deep neural networks.
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Submitted 6 June, 2020;
originally announced June 2020.
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Continual Weight Updates and Convolutional Architectures for Equilibrium Propagation
Authors:
Maxence Ernoult,
Julie Grollier,
Damien Querlioz,
Yoshua Bengio,
Benjamin Scellier
Abstract:
Equilibrium Propagation (EP) is a biologically inspired alternative algorithm to backpropagation (BP) for training neural networks. It applies to RNNs fed by a static input x that settle to a steady state, such as Hopfield networks. EP is similar to BP in that in the second phase of training, an error signal propagates backwards in the layers of the network, but contrary to BP, the learning rule o…
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Equilibrium Propagation (EP) is a biologically inspired alternative algorithm to backpropagation (BP) for training neural networks. It applies to RNNs fed by a static input x that settle to a steady state, such as Hopfield networks. EP is similar to BP in that in the second phase of training, an error signal propagates backwards in the layers of the network, but contrary to BP, the learning rule of EP is spatially local. Nonetheless, EP suffers from two major limitations. On the one hand, due to its formulation in terms of real-time dynamics, EP entails long simulation times, which limits its applicability to practical tasks. On the other hand, the biological plausibility of EP is limited by the fact that its learning rule is not local in time: the synapse update is performed after the dynamics of the second phase have converged and requires information of the first phase that is no longer available physically. Our work addresses these two issues and aims at widening the spectrum of EP from standard machine learning models to more bio-realistic neural networks. First, we propose a discrete-time formulation of EP which enables to simplify equations, speed up training and extend EP to CNNs. Our CNN model achieves the best performance ever reported on MNIST with EP. Using the same discrete-time formulation, we introduce Continual Equilibrium Propagation (C-EP): the weights of the network are adjusted continually in the second phase of training using local information in space and time. We show that in the limit of slow changes of synaptic strengths and small nudging, C-EP is equivalent to BPTT (Theorem 1). We numerically demonstrate Theorem 1 and C-EP training on MNIST and generalize it to the bio-realistic situation of a neural network with asymmetric connections between neurons.
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Submitted 29 April, 2020;
originally announced May 2020.
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Equilibrium Propagation with Continual Weight Updates
Authors:
Maxence Ernoult,
Julie Grollier,
Damien Querlioz,
Yoshua Bengio,
Benjamin Scellier
Abstract:
Equilibrium Propagation (EP) is a learning algorithm that bridges Machine Learning and Neuroscience, by computing gradients closely matching those of Backpropagation Through Time (BPTT), but with a learning rule local in space. Given an input $x$ and associated target $y$, EP proceeds in two phases: in the first phase neurons evolve freely towards a first steady state; in the second phase output n…
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Equilibrium Propagation (EP) is a learning algorithm that bridges Machine Learning and Neuroscience, by computing gradients closely matching those of Backpropagation Through Time (BPTT), but with a learning rule local in space. Given an input $x$ and associated target $y$, EP proceeds in two phases: in the first phase neurons evolve freely towards a first steady state; in the second phase output neurons are nudged towards $y$ until they reach a second steady state. However, in existing implementations of EP, the learning rule is not local in time: the weight update is performed after the dynamics of the second phase have converged and requires information of the first phase that is no longer available physically. In this work, we propose a version of EP named Continual Equilibrium Propagation (C-EP) where neuron and synapse dynamics occur simultaneously throughout the second phase, so that the weight update becomes local in time. Such a learning rule local both in space and time opens the possibility of an extremely energy efficient hardware implementation of EP. We prove theoretically that, provided the learning rates are sufficiently small, at each time step of the second phase the dynamics of neurons and synapses follow the gradients of the loss given by BPTT (Theorem 1). We demonstrate training with C-EP on MNIST and generalize C-EP to neural networks where neurons are connected by asymmetric connections. We show through experiments that the more the network updates follows the gradients of BPTT, the best it performs in terms of training. These results bring EP a step closer to biology by better complying with hardware constraints while maintaining its intimate link with backpropagation.
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Submitted 29 April, 2020;
originally announced May 2020.
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Low Power In-Memory Implementation of Ternary Neural Networks with Resistive RAM-Based Synapse
Authors:
Axel Laborieux,
Marc Bocquet,
Tifenn Hirtzlin,
Jacques-Olivier Klein,
Liza Herrera Diez,
Etienne Nowak,
Elisa Vianello,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a major lead for reducing the energy consumption of artificial intelligence (AI). Multiple works have for example proposed in-memory architectures to implement low power binarized neural networks. These simple neural networks, where synaptic weights and neuronal…
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The design of systems implementing low precision neural networks with emerging memories such as resistive random access memory (RRAM) is a major lead for reducing the energy consumption of artificial intelligence (AI). Multiple works have for example proposed in-memory architectures to implement low power binarized neural networks. These simple neural networks, where synaptic weights and neuronal activations assume binary values, can indeed approach state-of-the-art performance on vision tasks. In this work, we revisit one of these architectures where synapses are implemented in a differential fashion to reduce bit errors, and synaptic weights are read using precharge sense amplifiers. Based on experimental measurements on a hybrid 130 nm CMOS/RRAM chip and on circuit simulation, we show that the same memory array architecture can be used to implement ternary weights instead of binary weights, and that this technique is particularly appropriate if the sense amplifier is operated in near-threshold regime. We also show based on neural network simulation on the CIFAR-10 image recognition task that going from binary to ternary neural networks significantly increases neural network performance. These results highlight that AI circuits function may sometimes be revisited when operated in low power regimes.
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Submitted 5 May, 2020;
originally announced May 2020.
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Physics for Neuromorphic Computing
Authors:
Danijela Markovic,
Alice Mizrahi,
Damien Querlioz,
Julie Grollier
Abstract:
Neuromorphic computing takes inspiration from the brain to create energy efficient hardware for information processing, capable of highly sophisticated tasks. In this article, we make the case that building this new hardware necessitates reinventing electronics. We show that research in physics and material science will be key to create artificial nano-neurons and synapses, to connect them togethe…
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Neuromorphic computing takes inspiration from the brain to create energy efficient hardware for information processing, capable of highly sophisticated tasks. In this article, we make the case that building this new hardware necessitates reinventing electronics. We show that research in physics and material science will be key to create artificial nano-neurons and synapses, to connect them together in huge numbers, to organize them in complex systems, and to compute with them efficiently. We describe how some researchers choose to take inspiration from artificial intelligence to move forward in this direction, whereas others prefer taking inspiration from neuroscience, and we highlight recent striking results obtained with these two approaches. Finally, we discuss the challenges and perspectives in neuromorphic physics, which include developing the algorithms and the hardware hand in hand, making significant advances with small toy systems, as well as building large scale networks.
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Submitted 8 March, 2020;
originally announced March 2020.
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Synaptic Metaplasticity in Binarized Neural Networks
Authors:
Axel Laborieux,
Maxence Ernoult,
Tifenn Hirtzlin,
Damien Querlioz
Abstract:
While deep neural networks have surpassed human performance in multiple situations, they are prone to catastrophic forgetting: upon training a new task, they rapidly forget previously learned ones. Neuroscience studies, based on idealized tasks, suggest that in the brain, synapses overcome this issue by adjusting their plasticity depending on their past history. However, such "metaplastic" behavio…
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While deep neural networks have surpassed human performance in multiple situations, they are prone to catastrophic forgetting: upon training a new task, they rapidly forget previously learned ones. Neuroscience studies, based on idealized tasks, suggest that in the brain, synapses overcome this issue by adjusting their plasticity depending on their past history. However, such "metaplastic" behaviours do not transfer directly to mitigate catastrophic forgetting in deep neural networks. In this work, we interpret the hidden weights used by binarized neural networks, a low-precision version of deep neural networks, as metaplastic variables, and modify their training technique to alleviate forgetting. Building on this idea, we propose and demonstrate experimentally, in situations of multitask and stream learning, a training technique that reduces catastrophic forgetting without needing previously presented data, nor formal boundaries between datasets and with performance approaching more mainstream techniques with task boundaries. We support our approach with a theoretical analysis on a tractable task. This work bridges computational neuroscience and deep learning, and presents significant assets for future embedded and neuromorphic systems, especially when using novel nanodevices featuring physics analogous to metaplasticity.
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Submitted 23 March, 2021; v1 submitted 7 March, 2020;
originally announced March 2020.
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In-situ learning harnessing intrinsic resistive memory variability through Markov Chain Monte Carlo Sampling
Authors:
Thomas Dalgaty,
Niccolo Castellani,
Damien Querlioz,
Elisa Vianello
Abstract:
Resistive memory technologies promise to be a key component in unlocking the next generation of intelligent in-memory computing systems that can act and learn locally at the edge. However, current approaches to in-memory machine learning focus often on the implementation of models and algorithms which cannot be reconciled with the true, physical properties of resistive memory. Consequently, these…
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Resistive memory technologies promise to be a key component in unlocking the next generation of intelligent in-memory computing systems that can act and learn locally at the edge. However, current approaches to in-memory machine learning focus often on the implementation of models and algorithms which cannot be reconciled with the true, physical properties of resistive memory. Consequently, these properties, in particular cycle-to-cycle conductance variability, are considered as non-idealities that require mitigation. Here by contrast, we embrace these properties by selecting a more appropriate machine learning model and algorithm. We implement a Markov Chain Monte Carlo sampling algorithm within a fabricated array of 16,384 devices, configured as a Bayesian machine learning model. The algorithm is realised in-situ, by exploiting the devices as random variables from the perspective of their cycle-to-cycle conductance variability. We train experimentally the memory array to perform an illustrative supervised learning task as well as a malignant breast tissue recognition task, achieving an accuracy of 96.3%. Then, using a behavioural model of resistive memory calibrated on array level measurements, we apply the same approach to the Cartpole reinforcement learning task. In all cases our proposed approach outperformed software-based neural network models realised using an equivalent number of memory elements. This result lays a foundation for a new path in-memory machine learning, compatible with the true properties of resistive memory technologies, that can bring localised learning capabilities to intelligent edge computing systems.
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Submitted 30 January, 2020;
originally announced January 2020.
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Binding events through the mutual synchronization of spintronic nano-neurons
Authors:
Miguel Romera,
Philippe Talatchian,
Sumito Tsunegi,
Kay Yakushiji,
Akio Fukushima,
Hitoshi Kubota,
Shinji Yuasa,
Vincent Cros,
Paolo Bortolotti,
Maxence Ernoult,
Damien Querlioz,
Julie Grollier
Abstract:
The brain naturally binds events from different sources in unique concepts. It is hypothesized that this process occurs through the transient mutual synchronization of neurons located in different regions of the brain when the stimulus is presented. This mechanism of binding through synchronization can be directly implemented in neural networks composed of coupled oscillators. To do so, the oscill…
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The brain naturally binds events from different sources in unique concepts. It is hypothesized that this process occurs through the transient mutual synchronization of neurons located in different regions of the brain when the stimulus is presented. This mechanism of binding through synchronization can be directly implemented in neural networks composed of coupled oscillators. To do so, the oscillators must be able to mutually synchronize for the range of inputs corresponding to a single class, and otherwise remain desynchronized. Here we show that the outstanding ability of spintronic nano-oscillators to mutually synchronize and the possibility to precisely control the occurrence of mutual synchronization by tuning the oscillator frequencies over wide ranges allows pattern recognition. We demonstrate experimentally on a simple task that three spintronic nano-oscillators can bind consecutive events and thus recognize and distinguish temporal sequences. This work is a step forward in the construction of neural networks that exploit the non-linear dynamic properties of their components to perform brain-inspired computations.
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Submitted 22 January, 2020;
originally announced January 2020.
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Designing large arrays of interacting spin-torque nano-oscillators for microwave information processing
Authors:
Philippe Talatchian,
Miguel Romera,
Flavio Abreu Araujo,
Paolo Bortolotti,
Vincent Cros,
Damir Vodenicarevic,
Nicolas Locatelli,
Damien Querlioz,
Julie Grollier
Abstract:
Arrays of spin-torque nano-oscillators are promising for broadband microwave signal detection and processing, as well as for neuromorphic computing. In many of these applications, the oscillators should be engineered to have equally-spaced frequencies and equal sensitivity to microwave inputs. Here we design spin-torque nano-oscillator arrays with these rules and estimate their optimum size for a…
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Arrays of spin-torque nano-oscillators are promising for broadband microwave signal detection and processing, as well as for neuromorphic computing. In many of these applications, the oscillators should be engineered to have equally-spaced frequencies and equal sensitivity to microwave inputs. Here we design spin-torque nano-oscillator arrays with these rules and estimate their optimum size for a given sensitivity, as well as the frequency range that they cover. For this purpose, we explore analytically and numerically conditions to obtain vortex spin-torque nano-oscillators with equally-spaced gyrotropic oscillation frequencies and having all similar synchronization bandwidths to input microwave signals. We show that arrays of hundreds of oscillators covering ranges of several hundred MHz can be built taking into account nanofabrication constraints.
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Submitted 15 November, 2019; v1 submitted 26 August, 2019;
originally announced August 2019.
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Implementing Binarized Neural Networks with Magnetoresistive RAM without Error Correction
Authors:
Tifenn Hirtzlin,
Bogdan Penkovsky,
Jacques-Olivier Klein,
Nicolas Locatelli,
Adrien F. Vincent,
Marc Bocquet,
Jean-Michel Portal,
Damien Querlioz
Abstract:
One of the most exciting applications of Spin Torque Magnetoresistive Random Access Memory (ST-MRAM) is the in-memory implementation of deep neural networks, which could allow improving the energy efficiency of Artificial Intelligence by orders of magnitude with regards to its implementation on computers and graphics cards. In particular, ST-MRAM could be ideal for implementing Binarized Neural Ne…
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One of the most exciting applications of Spin Torque Magnetoresistive Random Access Memory (ST-MRAM) is the in-memory implementation of deep neural networks, which could allow improving the energy efficiency of Artificial Intelligence by orders of magnitude with regards to its implementation on computers and graphics cards. In particular, ST-MRAM could be ideal for implementing Binarized Neural Networks (BNNs), a type of deep neural networks discovered in 2016, which can achieve state-of-the-art performance with a highly reduced memory footprint with regards to conventional artificial intelligence approaches. The challenge of ST-MRAM, however, is that it is prone to write errors and usually requires the use of error correction. In this work, we show that these bit errors can be tolerated by BNNs to an outstanding level, based on examples of image recognition tasks (MNIST, CIFAR-10 and ImageNet): bit error rates of ST-MRAM up to 0.1% have little impact on recognition accuracy. The requirements for ST-MRAM are therefore considerably relaxed for BNNs with regards to traditional applications. By consequence, we show that for BNNs, ST-MRAMs can be programmed with weak (low-energy) programming conditions, without error correcting codes. We show that this result can allow the use of low energy and low area ST-MRAM cells, and show that the energy savings at the system level can reach a factor two.
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Submitted 12 August, 2019;
originally announced August 2019.
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Digital Biologically Plausible Implementation of Binarized Neural Networks with Differential Hafnium Oxide Resistive Memory Arrays
Authors:
Tifenn Hirtzlin,
Marc Bocquet,
Bogdan Penkovsky,
Jacques-Olivier Klein,
Etienne Nowak,
Elisa Vianello,
Jean-Michel Portal,
Damien Querlioz
Abstract:
The brain performs intelligent tasks with extremely low energy consumption. This work takes inspiration from two strategies used by the brain to achieve this energy efficiency: the absence of separation between computing and memory functions, and the reliance on low precision computation. The emergence of resistive memory technologies indeed provides an opportunity to co-integrate tightly logic an…
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The brain performs intelligent tasks with extremely low energy consumption. This work takes inspiration from two strategies used by the brain to achieve this energy efficiency: the absence of separation between computing and memory functions, and the reliance on low precision computation. The emergence of resistive memory technologies indeed provides an opportunity to co-integrate tightly logic and memory in hardware. In parallel, the recently proposed concept of Binarized Neural Network, where multiplications are replaced by exclusive NOR (XNOR) logic gates, offers a way to implement artificial intelligence using very low precision computation. In this work, we therefore propose a strategy to implement low energy Binarized Neural Networks, which employs brain-inspired concepts, while retaining energy benefits from digital electronics. We design, fabricate and test a memory array, including periphery and sensing circuits, optimized for this in-memory computing scheme. Our circuit employs hafnium oxide resistive memory integrated in the back end of line of a 130 nanometer CMOS process, in a two transistors - two resistors cell, which allows performing the exclusive NOR operations of the neural network directly within the sense amplifiers. We show, based on extensive electrical measurements, that our design allows reducing the amount of bit errors on the synaptic weights, without the use of formal error correcting codes. We design a whole system using this memory array. We show on standard machine learning tasks (MNIST, CIFAR-10, ImageNet and an ECG task) that the system has an inherent resilience to bit errors. We evidence that its energy consumption is attractive compared to more standard approaches, and that it can use the memory devices in regimes where they exhibit particularly low programming energy and high endurance.
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Submitted 7 December, 2019; v1 submitted 12 August, 2019;
originally announced August 2019.
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Voltage control of domain walls in magnetic nanowires for energy efficient neuromorphic devices
Authors:
Md Ali Azam,
Dhritiman Bhattacharya,
Damien Querlioz,
Caroline A. Ross,
Jayasimha Atulasimha
Abstract:
An energy-efficient voltage controlled domain wall device for implementing an artificial neuron and synapse is analyzed using micromagnetic modeling in the presence of room temperature thermal noise. By controlling the domain wall motion utilizing spin transfer or spin orbit torques in association with voltage generated strain control of perpendicular magnetic anisotropy in the presence of Dzyalos…
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An energy-efficient voltage controlled domain wall device for implementing an artificial neuron and synapse is analyzed using micromagnetic modeling in the presence of room temperature thermal noise. By controlling the domain wall motion utilizing spin transfer or spin orbit torques in association with voltage generated strain control of perpendicular magnetic anisotropy in the presence of Dzyaloshinskii-Moriya interaction, different positions of the domain wall are realized in the free layer of a magnetic tunnel junction to program different synaptic weights. The feasibility of scaling of such devices is assessed in the presence of thermal perturbations that compromise controllability. Additionally, an artificial neuron can be realized by combining this DW device with a CMOS buffer. This provides a possible pathway to realize energy efficient voltage controlled nanomagnetic deep neural networks that can learn in real time.
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Submitted 5 September, 2019; v1 submitted 12 July, 2019;
originally announced July 2019.
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Role of non-linear data processing on speech recognition task in the framework of reservoir computing
Authors:
Flavio Abreu Araujo,
Mathieu Riou,
Jacob Torrejon,
Sumito Tsunegi,
Damien Querlioz,
Kay Yakushiji,
Akio Fukushima,
Hitoshi Kubota,
Shinji Yuasa,
Mark D. Stiles,
Julie Grollier
Abstract:
The reservoir computing neural network architecture is widely used to test hardware systems for neuromorphic computing. One of the preferred tasks for bench-marking such devices is automatic speech recognition. However, this task requires acoustic transformations from sound waveforms with varying amplitudes to frequency domain maps that can be seen as feature extraction techniques. Depending on th…
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The reservoir computing neural network architecture is widely used to test hardware systems for neuromorphic computing. One of the preferred tasks for bench-marking such devices is automatic speech recognition. However, this task requires acoustic transformations from sound waveforms with varying amplitudes to frequency domain maps that can be seen as feature extraction techniques. Depending on the conversion method, these may obscure the contribution of the neuromorphic hardware to the overall speech recognition performance. Here, we quantify and separate the contributions of the acoustic transformations and the neuromorphic hardware to the speech recognition success rate. We show that the non-linearity in the acoustic transformation plays a critical role in feature extraction. We compute the gain in word success rate provided by a reservoir computing device compared to the acoustic transformation only, and show that it is an appropriate benchmark for comparing different hardware. Finally, we experimentally and numerically quantify the impact of the different acoustic transformations for neuromorphic hardware based on magnetic nano-oscillators.
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Submitted 19 December, 2019; v1 submitted 10 May, 2019;
originally announced June 2019.
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Stochastic Computing for Hardware Implementation of Binarized Neural Networks
Authors:
Tifenn Hirtzlin,
Bogdan Penkovsky,
Marc Bocquet,
Jacques-Olivier Klein,
Jean-Michel Portal,
Damien Querlioz
Abstract:
Binarized Neural Networks, a recently discovered class of neural networks with minimal memory requirements and no reliance on multiplication, are a fantastic opportunity for the realization of compact and energy efficient inference hardware. However, such neural networks are generally not entirely binarized: their first layer remains with fixed point input. In this work, we propose a stochastic co…
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Binarized Neural Networks, a recently discovered class of neural networks with minimal memory requirements and no reliance on multiplication, are a fantastic opportunity for the realization of compact and energy efficient inference hardware. However, such neural networks are generally not entirely binarized: their first layer remains with fixed point input. In this work, we propose a stochastic computing version of Binarized Neural Networks, where the input is also binarized. Simulations on the example of the Fashion-MNIST and CIFAR-10 datasets show that such networks can approach the performance of conventional Binarized Neural Networks. We evidence that the training procedure should be adapted for use with stochastic computing. Finally, the ASIC implementation of our scheme is investigated, in a system that closely associates logic and memory, implemented by Spin Torque Magnetoresistive Random Access Memory. This analysis shows that the stochastic computing approach can allow considerable savings with regards to conventional Binarized Neural networks in terms of area (62% area reduction on the Fashion-MNIST task). It can also allow important savings in terms of energy consumption, if we accept reasonable reduction of accuracy: for example a factor 2.1 can be saved, with the cost of 1.4% in Fashion-MNIST test accuracy. These results highlight the high potential of Binarized Neural Networks for hardware implementation, and that adapting them to hardware constrains can provide important benefits.
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Submitted 3 June, 2019;
originally announced June 2019.
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Updates of Equilibrium Prop Match Gradients of Backprop Through Time in an RNN with Static Input
Authors:
Maxence Ernoult,
Julie Grollier,
Damien Querlioz,
Yoshua Bengio,
Benjamin Scellier
Abstract:
Equilibrium Propagation (EP) is a biologically inspired learning algorithm for convergent recurrent neural networks, i.e. RNNs that are fed by a static input x and settle to a steady state. Training convergent RNNs consists in adjusting the weights until the steady state of output neurons coincides with a target y. Convergent RNNs can also be trained with the more conventional Backpropagation Thro…
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Equilibrium Propagation (EP) is a biologically inspired learning algorithm for convergent recurrent neural networks, i.e. RNNs that are fed by a static input x and settle to a steady state. Training convergent RNNs consists in adjusting the weights until the steady state of output neurons coincides with a target y. Convergent RNNs can also be trained with the more conventional Backpropagation Through Time (BPTT) algorithm. In its original formulation EP was described in the case of real-time neuronal dynamics, which is computationally costly. In this work, we introduce a discrete-time version of EP with simplified equations and with reduced simulation time, bringing EP closer to practical machine learning tasks. We first prove theoretically, as well as numerically that the neural and weight updates of EP, computed by forward-time dynamics, are step-by-step equal to the ones obtained by BPTT, with gradients computed backward in time. The equality is strict when the transition function of the dynamics derives from a primitive function and the steady state is maintained long enough. We then show for more standard discrete-time neural network dynamics that the same property is approximately respected and we subsequently demonstrate training with EP with equivalent performance to BPTT. In particular, we define the first convolutional architecture trained with EP achieving ~ 1% test error on MNIST, which is the lowest error reported with EP. These results can guide the development of deep neural networks trained with EP.
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Submitted 31 May, 2019;
originally announced May 2019.