Showing 1–22 of 22 results for author: Rines, R

Logical Compilation for Multi-Qubit Iceberg Patches

Authors: Cordell Mazzetti, Sayam Sethi, Rich Rines, Pranav Gokhale, Jonathan Mark Baker

Abstract: Recent advancements in quantum computing have enabled practical use of quantum error detecting and correcting codes. However, current architectures and future proposals of quantum computer design suffer from limited qubit counts, necessitating the use of high-rate codes. Such codes, with their code parameters denoted as $[[n, k, d]]$, have more than $1$ logical qubit per code (i.e., $k > 1$). This… ▽ More Recent advancements in quantum computing have enabled practical use of quantum error detecting and correcting codes. However, current architectures and future proposals of quantum computer design suffer from limited qubit counts, necessitating the use of high-rate codes. Such codes, with their code parameters denoted as $[[n, k, d]]$, have more than $1$ logical qubit per code (i.e., $k > 1$). This leads to reduced error tolerance of the code, since $\lceil (d-1)/2\rceil$ errors on any of the $n$ physical qubits can affect the logical state of all $k$ logical qubits. Therefore, it becomes critical to optimally map the input qubits of a quantum circuit to these codes, in such a way that the circuit fidelity is maximized. \par However, the problem of mapping program qubits to logical qubits for high-rate codes has not been studied in prior work. A brute force search to find the optimal mapping is super exponential (scaling as $O(n!)$, where $n$ is the number of input qubits), making exhaustive search infeasible past a small number of qubits. We propose a framework that addresses this problem on two fronts: (1) for any given mapping, it performs logical-to-physical compilation that translates input gates into efficiently encoded implementations utilizing Hadamard commutation and gate merging; and (2) it quickly searches the space of possible mappings through a merge-optimizing, noise-biased packing heuristic that identifies high-performing qubit assignments without exhaustive enumeration. To the best of our knowledge, our compiler is the first work to explore mapping and compilation for high-rate codes. Across 71 benchmark circuits, we reduce circuit depth by $34\%$, gate counts by up to $31\%$ and $17\%$ for one-qubit and two-qubit gates, and improve total variation distance by $1.75\times$, with logical selection rate improvements averaging $86\%$ relative to naive compilation. △ Less

Submitted 10 April, 2026; originally announced April 2026.

Comments: 15 pages, 17 figures

Resource Estimation via Efficient Compilation of Key Quantum Primitives

Authors: Colin Campbell, Rich Rines, Victory Omole, Tina Oberoi, Palash Goiporia, Rayat Roy, R. Peyton Cline, Eric B. Jones, Teague Tomesh

Abstract: Resource estimation is a significant challenge in evaluating fault tolerant quantum computers. Existing approaches often rely on either fixed architectural assumptions or coarse analytical models that fail to capture the interaction between hardware constraints and circuit compilation. This challenge is particularly acute for neutral atom quantum computers, where architectural features such as ato… ▽ More Resource estimation is a significant challenge in evaluating fault tolerant quantum computers. Existing approaches often rely on either fixed architectural assumptions or coarse analytical models that fail to capture the interaction between hardware constraints and circuit compilation. This challenge is particularly acute for neutral atom quantum computers, where architectural features such as atom movement, measurement zones, and multi-species arrays introduce a broad design space for implementing fault tolerant computation. Addressing the need for a tighter feedback loop between hardware design and practical application development, we present a compilation-driven framework for quantum resource estimation that translates arbitrary quantum circuits into logical primitive operations with known physical resource costs. This framework allows for easily configurable hardware assumptions that enable rapid comparison of different architectural design choices. We apply our approach to two early fault tolerant quantum simulation and optimization workloads, assuming the use of the surface code, revealing several architectural trends. While the production of magic states continues to be the dominant source of overhead for these benchmarks, access to movement can save time on cultivation and important transversal gates. As problem size grows, routing and qubit movement become dominant bottlenecks, highlighting the need for movement-aware compiler optimizations and frugal routing strategies. Finally, our results suggest that neutral atom architectures combining dual-species arrays with controlled qubit movement offer a promising path toward near-term advantage on fault tolerant devices. △ Less

Submitted 1 April, 2026; originally announced April 2026.

Comments: 27 pages, 13 figures, 3 tables

Quantum Depth Compression via Local Dynamic Circuits

Authors: Benjamin Hall, Palash Goiporia, Rich Rines

Abstract: We present Quantum Depth Compression (QDC), a general compilation framework that utilizes dynamic circuits to reduce arbitrary quantum circuits to depth linear in the number of non-Clifford gates and to grid connectivity without the need for expensive SWAP-networks. The framework consists of pushing Clifford gates to the end of the circuit, resulting in a sequence of non-Clifford Pauli-phasors fol… ▽ More We present Quantum Depth Compression (QDC), a general compilation framework that utilizes dynamic circuits to reduce arbitrary quantum circuits to depth linear in the number of non-Clifford gates and to grid connectivity without the need for expensive SWAP-networks. The framework consists of pushing Clifford gates to the end of the circuit, resulting in a sequence of non-Clifford Pauli-phasors followed by an all Clifford sub-circuit, both of which are then reduced to constant depth via dynamic circuits. We show that applying QDC to random Pauli-phasor circuits lowers both their depth and CNOT count compared to a standard alternative compiler. △ Less

Submitted 18 March, 2026; originally announced March 2026.

Comments: 10 pages, 15 figures

Demonstration of a Logical Architecture Uniting Motion and In-Place Entanglement

Authors: Rich Rines, Benjamin Hall, Mariesa H. Teo, Joshua Viszlai, Daniel C. Cole, David Mason, Cameron Barker, Matt J. Bedalov, Matt Blakely, Tobias Bothwell, Caitlin Carnahan, Frederic T. Chong, Samuel Y. Eubanks, Brian Fields, Matthew Gillette, Palash Goiporia, Pranav Gokhale, Garrett T. Hickman, Marin Iliev, Eric B. Jones, Ryan A. Jones, Kevin W. Kuper, Stephanie Lee, Martin T. Lichtman, Kevin Loeffler , et al. (13 additional authors not shown)

Abstract: We demonstrate a logical neutral atom architecture that integrates atom motion with in-place entanglement to achieve lower overheads than entangling-zone approaches. Using a 114-qubit device, we perform three proof-of-principle logical-qubit experiments. First, we implement a pre-compiled, non-scalable variant of Shor's algorithm, observing improved logical-over-physical performance, including wit… ▽ More We demonstrate a logical neutral atom architecture that integrates atom motion with in-place entanglement to achieve lower overheads than entangling-zone approaches. Using a 114-qubit device, we perform three proof-of-principle logical-qubit experiments. First, we implement a pre-compiled, non-scalable variant of Shor's algorithm, observing improved logical-over-physical performance, including with loss correction and leakage detection, achieving up to a 2x reduction in TVD. Second, we construct constant-depth logical CX ladders; on current hardware these execute with serial entangling operations, yet still yield 2-4x lower error for 8 and 12 logical qubits. Third, we prepare the [[16,4,4]] code and perform single-round decoding with post-processed error correction, achieving 8x improvement on logical vs physical. These results demonstrate how combining motion with in-place entanglement offers lower overhead than entangling-zone approaches. △ Less

Submitted 2 April, 2026; v1 submitted 16 September, 2025; originally announced September 2025.

Comments: 18 pages, 13 figures

Fault-Tolerant Operation and Materials Science with Neutral Atom Logical Qubits

Authors: Matt. J. Bedalov, Matt Blakely, Peter. D. Buttler, Caitlin Carnahan, Frederic T. Chong, Woo Chang Chung, Dan C. Cole, Palash Goiporia, Pranav Gokhale, Bettina Heim, Garrett T. Hickman, Eric B. Jones, Ryan A. Jones, Pradnya Khalate, Jin-Sung Kim, Kevin W. Kuper, Martin T. Lichtman, Stephanie Lee, David Mason, Nathan A. Neff-Mallon, Thomas W. Noel, Victory Omole, Alexander G. Radnaev, Rich Rines, Mark Saffman , et al. (5 additional authors not shown)

Abstract: We report on the fault-tolerant operation of logical qubits on a neutral atom quantum computer, with logical performance surpassing physical performance for multiple circuits including Bell states (12x error reduction), random circuits (15x), and a prototype Anderson Impurity Model ground state solver for materials science applications (up to 6x, non-fault-tolerantly). The logical qubits are imple… ▽ More We report on the fault-tolerant operation of logical qubits on a neutral atom quantum computer, with logical performance surpassing physical performance for multiple circuits including Bell states (12x error reduction), random circuits (15x), and a prototype Anderson Impurity Model ground state solver for materials science applications (up to 6x, non-fault-tolerantly). The logical qubits are implemented via the [[4, 2, 2]] code (C4). Our work constitutes the first complete realization of the benchmarking protocol proposed by Gottesman 2016 [1] demonstrating results consistent with fault-tolerance. In light of recent advances on applying concatenated C4/C6 detection codes to achieve error correction with high code rates and thresholds, our work can be regarded as a building block towards a practical scheme for fault tolerant quantum computation. Our demonstration of a materials science application with logical qubits particularly demonstrates the immediate value of these techniques on current experiments. △ Less

Submitted 10 December, 2024; originally announced December 2024.

Sphere Packing on a Quantum Computer for Chromatography Modeling

Authors: Benjamin Hall, Ian Njoroge, Colin Campbell, Bharath Thotakura, Rich Rines, Victory Omole, Maen Qadan

Abstract: Column chromatography is an important process in downstream biopharmaceutical manufacturing that enables high-selectivity separation of proteins through various modalities, such as affinity, ion exchange, hydrophobic interactions, or a combination of the aforementioned modes. Current mechanistic models of column chromatography typically abstract particle-level phenomena, in particular adsorption k… ▽ More Column chromatography is an important process in downstream biopharmaceutical manufacturing that enables high-selectivity separation of proteins through various modalities, such as affinity, ion exchange, hydrophobic interactions, or a combination of the aforementioned modes. Current mechanistic models of column chromatography typically abstract particle-level phenomena, in particular adsorption kinetics. A mechanistic model capable of incorporating particle-level phenomena would increase the value derived from mechanistic models. To this end, we model column chromatography via sphere packing, formulating three versions, each with increasing complexity. The first, homogeneous circle packing, is recast as maximum independent set and solved by the Quantum Approximate Optimization Algorithm on a quantum computer. The second, heterogeneous circle packing, is formulated as a graphical optimization problem and solved via classical simulations, accompanied by a road map to a quantum solution. An extension to the third, heterogeneous sphere packing, is formulated mathematically in a manner suitable to a quantum solution. Finally, detailed resource scaling is conducted to estimate the quantum resources required to simulate the most realistic model, providing a pathway to quantum advantage. △ Less

Submitted 17 December, 2024; v1 submitted 30 November, 2024; originally announced December 2024.

Noise-Aware Circuit Compilations for a Continuously Parameterized Two-Qubit Gateset

Authors: Christopher G. Yale, Rich Rines, Victory Omole, Bharath Thotakura, Ashlyn D. Burch, Matthew N. H. Chow, Megan Ivory, Daniel Lobser, Brian K. McFarland, Melissa C. Revelle, Susan M. Clark, Pranav Gokhale

Abstract: State-of-the-art noisy-intermediate-scale quantum (NISQ) processors are currently implemented across a variety of hardware platforms, each with their own distinct gatesets. As such, circuit compilation should not only be aware of, but also deeply connect to, the native gateset and noise properties of each. Trapped-ion processors are one such platform that provides a gateset that can be continuousl… ▽ More State-of-the-art noisy-intermediate-scale quantum (NISQ) processors are currently implemented across a variety of hardware platforms, each with their own distinct gatesets. As such, circuit compilation should not only be aware of, but also deeply connect to, the native gateset and noise properties of each. Trapped-ion processors are one such platform that provides a gateset that can be continuously parameterized across both one- and two-qubit gates. Here we use the Quantum Scientific Computing Open User Testbed (QSCOUT) to study noise-aware compilations focused on continuously parameterized two-qubit $\mathcal{ZZ}$ gates (based on the Mølmer-Sørensen interaction) using $\textbf{Superstaq}$, a quantum software platform for hardware-aware circuit compiler optimizations. We discuss the realization of $\mathcal{ZZ}$ gates with arbitrary angle on the all-to-all connected trapped-ion system. Then we discuss a variety of different compiler optimizations that innately target these $\mathcal{ZZ}$ gates and their noise properties. These optimizations include moving from a restricted maximally entangling gateset to a continuously parameterized one, swap mirroring to further reduce total entangling angle of the operations, focusing the heaviest $\mathcal{ZZ}$ angle participation on the best performing gate pairs, and circuit approximation to remove the least impactful $\mathcal{ZZ}$ gates. We demonstrate these compilation approaches on the hardware with randomized quantum volume circuits, observing the potential to realize a larger quantum volume as a result of these optimizations. Using differing yet complementary analysis techniques, we observe the distinct improvements in system performance provided by these noise-aware compilations and study the role of stochastic and coherent error channels for each compilation choice. △ Less

Submitted 1 November, 2024; originally announced November 2024.

Comments: 17 pages, 13 figures

Journal ref: Phys. Rev. Appl. 24, 024057 (2025)

A universal neutral-atom quantum computer with individual optical addressing and non-destructive readout

Authors: A. G. Radnaev, W. C. Chung, D. C. Cole, D. Mason, T. G. Ballance, M. J. Bedalov, D. A. Belknap, M. R. Berman, M. Blakely, I. L. Bloomfield, P. D. Buttler, C. Campbell, A. Chopinaud, E. Copenhaver, M. K. Dawes, S. Y. Eubanks, A. J. Friss, D. M. Garcia, J. Gilbert, M. Gillette, P. Goiporia, P. Gokhale, J. Goldwin, D. Goodwin, T. M. Graham , et al. (33 additional authors not shown)

Abstract: Quantum computers must achieve large-scale, fault-tolerant operation to deliver on their promise of transformational processing power [1-4]. This will require thousands or millions of high-fidelity quantum gates and similar numbers of qubits [5]. Demonstrations using neutral-atom qubits trapped and manipulated by lasers have shown that this modality can provide high two-qubit gate (CZ) fidelities… ▽ More Quantum computers must achieve large-scale, fault-tolerant operation to deliver on their promise of transformational processing power [1-4]. This will require thousands or millions of high-fidelity quantum gates and similar numbers of qubits [5]. Demonstrations using neutral-atom qubits trapped and manipulated by lasers have shown that this modality can provide high two-qubit gate (CZ) fidelities and scalable operation [6-13]. However, the gates in these demonstrations are driven by lasers that do not resolve individual qubits, with universal computation enabled by physical mid-circuit shuttling of the qubits. This relatively slow operation may greatly extend runtimes for useful, large-scale computation. Here we demonstrate a universal neutral-atom quantum computer with gate rates limited by optical switching times, rather than shuttling, by individually addressing tightly focused laser beams at an array of single atoms. We achieve CZ fidelity of 99.35(4)% and local single-qubit RZ gate fidelity of 99.902(8)%. Moreover, we demonstrate non-destructive readout of alkali-atom qubits with 0.9(3)% loss, which boosts operational speed. This technique also enables us to measure a state-of-the-art CZ fidelity of 99.73(3)% when excluding atom-loss events, which may be mitigated through erasure conversion. Our results represent a critical step towards large-scale, fault-tolerant neutral-atom quantum computers that can execute computations on practical timescales. △ Less

Submitted 19 January, 2025; v1 submitted 15 August, 2024; originally announced August 2024.

Journal ref: PRX Quantum 6, 030334 (2025)

Average circuit eigenvalue sampling on NISQ devices

Authors: Emilio Pelaez, Victory Omole, Pranav Gokhale, Rich Rines, Kaitlin N. Smith, Michael A. Perlin, Akel Hashim

Abstract: Average circuit eigenvalue sampling (ACES) was introduced by Flammia in arXiv:2108.05803 as a protocol to characterize the Pauli error channels of individual gates across the device simultaneously. The original paper posed using ACES to characterize near-term devices as an open problem. This work advances in this direction by presenting a full implementation of ACES for real devices and deploying… ▽ More Average circuit eigenvalue sampling (ACES) was introduced by Flammia in arXiv:2108.05803 as a protocol to characterize the Pauli error channels of individual gates across the device simultaneously. The original paper posed using ACES to characterize near-term devices as an open problem. This work advances in this direction by presenting a full implementation of ACES for real devices and deploying it to Superstaq arXiv:2309.05157, along with a device-tailored resource estimation obtained through simulations and experiments. Our simulations show that ACES is able to estimate one- and two-qubit non-uniform Pauli error channels to an average eigenvalue absolute error of under $0.003$ and total variation distance of under 0.001 between simulated and reconstructed probability distributions over Pauli errors with $10^5$ shots per circuit using 5 circuits of depth 14. The question of estimating general error channels through twirling techniques in real devices remains open, as it is dependent on a device's native gates, but simulations with the Clifford set show results in agreement with reported hardware data. Experimental results on IBM's Algiers and Osaka devices are presented, where we characterize their error channels as Pauli channels without twirling. △ Less

Submitted 20 March, 2024; v1 submitted 19 March, 2024; originally announced March 2024.

Comments: 7 pages, 6 figures

Q-CHOP: Quantum constrained Hamiltonian optimization

Authors: Michael A. Perlin, Ruslan Shaydulin, Benjamin P. Hall, Pierre Minssen, Changhao Li, Kabir Dubey, Rich Rines, Eric R. Anschuetz, Marco Pistoia, Pranav Gokhale

Abstract: Combinatorial optimization problems that arise in science and industry typically have constraints. Yet the presence of constraints makes them challenging to tackle using both classical and quantum optimization algorithms. We propose a new quantum algorithm for constrained optimization, which we call quantum constrained Hamiltonian optimization (Q-CHOP). Our algorithm leverages the observation that… ▽ More Combinatorial optimization problems that arise in science and industry typically have constraints. Yet the presence of constraints makes them challenging to tackle using both classical and quantum optimization algorithms. We propose a new quantum algorithm for constrained optimization, which we call quantum constrained Hamiltonian optimization (Q-CHOP). Our algorithm leverages the observation that for many problems, while the best solution is difficult to find, the worst feasible (constraint-satisfying) solution is known. The basic idea of Q-CHOP is to enforce a Hamiltonian constraint at all times, thereby restricting evolution to the subspace of feasible states, and slowly ``rotate'' an objective Hamiltonian to trace an adiabatic path from the worst feasible state to the best feasible state. Q-CHOP thereby assigns qualitatively distinct roles to the constraint and objective functions of a constrained optimization problem. We additionally propose a version of Q-CHOP that can start in any feasible state. Finally, we benchmark Q-CHOP against the commonly-used adiabatic algorithm of quantum annealing with an objective function that penalizes constraint violation, and find that Q-CHOP consistently performs significantly better on a wide range of problems, including textbook graph problems, knapsack problems, combinatorial auctions, and a real-world financial use case of bond exchange-traded fund basket optimization. △ Less

Submitted 14 January, 2026; v1 submitted 8 March, 2024; originally announced March 2024.

Comments: uploading accepted version

Journal ref: ACM Transactions on Quantum Computing (December 2025)

Superstaq: Deep Optimization of Quantum Programs

Authors: Colin Campbell, Frederic T. Chong, Denny Dahl, Paige Frederick, Palash Goiporia, Pranav Gokhale, Benjamin Hall, Salahedeen Issa, Eric Jones, Stephanie Lee, Andrew Litteken, Victory Omole, David Owusu-Antwi, Michael A. Perlin, Rich Rines, Kaitlin N. Smith, Noah Goss, Akel Hashim, Ravi Naik, Ed Younis, Daniel Lobser, Christopher G. Yale, Benchen Huang, Ji Liu

Abstract: We describe Superstaq, a quantum software platform that optimizes the execution of quantum programs by tailoring to underlying hardware primitives. For benchmarks such as the Bernstein-Vazirani algorithm and the Qubit Coupled Cluster chemistry method, we find that deep optimization can improve program execution performance by at least 10x compared to prevailing state-of-the-art compilers. To highl… ▽ More We describe Superstaq, a quantum software platform that optimizes the execution of quantum programs by tailoring to underlying hardware primitives. For benchmarks such as the Bernstein-Vazirani algorithm and the Qubit Coupled Cluster chemistry method, we find that deep optimization can improve program execution performance by at least 10x compared to prevailing state-of-the-art compilers. To highlight the versatility of our approach, we present results from several hardware platforms: superconducting qubits (AQT @ LBNL, IBM Quantum, Rigetti), trapped ions (QSCOUT), and neutral atoms (Infleqtion). Across all platforms, we demonstrate new levels of performance and new capabilities that are enabled by deeper integration between quantum programs and the device physics of hardware. △ Less

Submitted 10 September, 2023; originally announced September 2023.

Comments: Appearing in IEEE QCE 2023 (Quantum Week) conference

Clifford-based Circuit Cutting for Quantum Simulation

Authors: Kaitlin N. Smith, Michael A. Perlin, Pranav Gokhale, Paige Frederick, David Owusu-Antwi, Richard Rines, Victory Omole, Frederic T. Chong

Abstract: Quantum computing has potential to provide exponential speedups over classical computing for many important applications. However, today's quantum computers are in their early stages, and hardware quality issues hinder the scale of program execution. Benchmarking and simulation of quantum circuits on classical computers is therefore essential to advance the understanding of how quantum computers a… ▽ More Quantum computing has potential to provide exponential speedups over classical computing for many important applications. However, today's quantum computers are in their early stages, and hardware quality issues hinder the scale of program execution. Benchmarking and simulation of quantum circuits on classical computers is therefore essential to advance the understanding of how quantum computers and programs operate, enabling both algorithm discovery that leads to high-impact quantum computation and engineering improvements that deliver to more powerful quantum systems. Unfortunately, the nature of quantum information causes simulation complexity to scale exponentially with problem size. In this paper, we debut Super.tech's SuperSim framework, a new approach for high fidelity and scalable quantum circuit simulation. SuperSim employs two key techniques for accelerated quantum circuit simulation: Clifford-based simulation and circuit cutting. Through the isolation of Clifford subcircuit fragments within a larger non-Clifford circuit, resource-efficient Clifford simulation can be invoked, leading to significant reductions in runtime. After fragments are independently executed, circuit cutting and recombination procedures allow the final output of the original circuit to be reconstructed from fragment execution results. Through the combination of these two state-of-art techniques, SuperSim is a product for quantum practitioners that allows quantum circuit evaluation to scale beyond the frontiers of current simulators. Our results show that Clifford-based circuit cutting accelerates the simulation of near-Clifford circuits, allowing 100s of qubits to be evaluated with modest runtimes. △ Less

Submitted 19 March, 2023; originally announced March 2023.

Comments: To appear at the 50th International Symposium on Computer Architecture (ISCA 2023)

SupercheQ: Quantum Advantage for Distributed Databases

Authors: E. R. Anschuetz, P. Gokhale, B. Tonekaboni, C. Campbell, F. T. Chong, E. D. Dahl, P. Frederick, E. B. Jones, B. Hall, S. Issa, P. Goiporia, J. Liu, S. Lee, P. Noell, V. Omole, D. Owusu-Antwi, M. A. Perlin, R. Rines, M. Saffman, K. N. Smith, T. Tomesh

Abstract: We introduce Supercheq, a family of quantum protocols that achieves asymptotic advantage over classical protocols for checking the equivalence of files, a task also known as fingerprinting. The first variant, Supercheq-EE (Efficient Encoding), uses $n$ qubits to verify files with $2^{O(n)}$ bits -- an exponential advantage in communication complexity (i.e.~bandwidth, often the limiting factor in n… ▽ More We introduce Supercheq, a family of quantum protocols that achieves asymptotic advantage over classical protocols for checking the equivalence of files, a task also known as fingerprinting. The first variant, Supercheq-EE (Efficient Encoding), uses $n$ qubits to verify files with $2^{O(n)}$ bits -- an exponential advantage in communication complexity (i.e.~bandwidth, often the limiting factor in networked applications) over the best possible classical protocol in the simultaneous message passing setting. Moreover, Supercheq-EE can be gracefully scaled down for implementation on circuits with $\mathrm{poly}(n^\ell)$ depth to enable verification for files with $O(n^\ell)$ bits for arbitrary constant $\ell$. The quantum advantage is achieved by random circuit sampling, thereby potentially endowing circuits from recent quantum supremacy and quantum volume experiments with a practical application. We validate Supercheq-EE's performance at scale through GPU simulation motivated by Infleqtion's Sqale neutral atom QPU gateset. The second variant, Supercheq-IE (Incremental Encoding), also achieves arbitrary-polynomial advantage in fingerprint size ($n$ qubits to verify files with size $O(n^{\ell})$ bits), while supporting incremental updates to the fingerprint using only a constant number of $(\ell-1)$-qubit gates. Moreover, Supercheq-IE at $\ell=2$ ($\geq 3$) only requires Clifford gates (gates in the $\ell-1$ level of the Clifford hierarchy), ensuring relatively modest overheads for error-corrected implementation. We experimentally demonstrate proof-of-concepts on quantum hardware from Diraq (spin qubit) and IBM (superconducting). We envision Supercheq could be deployed in distributed data settings, accompanying replicas of important databases. △ Less

Submitted 5 July, 2026; v1 submitted 7 December, 2022; originally announced December 2022.

Comments: 20 pages, 14 figures

Practical implications of SFQ-based two-qubit gates

Authors: Mohammad Reza Jokar, Richard Rines, Frederic T. Chong

Abstract: Scalability of today's superconducting quantum computers is limited due to the huge costs of generating/routing microwave control pulses per qubit from room temperature. One active research area in both industry and academia is to push the classical controllers to the dilution refrigerator in order to increase the scalability of quantum computers. Superconducting Single Flux Quantum (SFQ) is a cla… ▽ More Scalability of today's superconducting quantum computers is limited due to the huge costs of generating/routing microwave control pulses per qubit from room temperature. One active research area in both industry and academia is to push the classical controllers to the dilution refrigerator in order to increase the scalability of quantum computers. Superconducting Single Flux Quantum (SFQ) is a classical logic technology with low power consumption and ultra-high speed, and thus is a promising candidate for in-fridge classical controllers with maximized scalability. Prior work has demonstrated high-fidelity SFQ-based single-qubit gates. However, little research has been done on SFQ-based multi-qubit gates, which are necessary to realize SFQ-based universal quantum computing. In this paper, we present the first thorough analysis of SFQ-based two-qubit gates. Our observations show that SFQ-based two-qubit gates tend to have high leakage to qubit non-computational subspace, which presents severe design challenges. We show that despite these challenges, we can realize gates with high fidelity by carefully designing optimal control methods and qubit architectures. We develop optimal control methods that suppress leakage, and also investigate various qubit architectures that reduce the leakage. After carefully engineering our SFQ-friendly quantum system, we show that it can achieve similar gate fidelity and gate time to microwave-based quantum systems. The promising results of this paper show that (1) SFQ-based universal quantum computation is both feasible and effective; and (2) SFQ is a promising approach in designing classical controller for quantum machines because it can increase the scalability while preserving gate fidelity and performance. △ Less

Submitted 3 February, 2022; originally announced February 2022.

DigiQ: A Scalable Digital Controller for Quantum Computers Using SFQ Logic

Authors: Mohammad Reza Jokar, Richard Rines, Ghasem Pasandi, Haolin Cong, Adam Holmes, Yunong Shi, Massoud Pedram, Frederic T. Chong

Abstract: The control of cryogenic qubits in today's superconducting quantum computer prototypes presents significant scalability challenges due to the massive costs of generating/routing the analog control signals that need to be sent from a classical controller at room temperature to the quantum chip inside the dilution refrigerator. Thus, researchers in industry and academia have focused on designing in-… ▽ More The control of cryogenic qubits in today's superconducting quantum computer prototypes presents significant scalability challenges due to the massive costs of generating/routing the analog control signals that need to be sent from a classical controller at room temperature to the quantum chip inside the dilution refrigerator. Thus, researchers in industry and academia have focused on designing in-fridge classical controllers in order to mitigate these challenges. Superconducting Single Flux Quantum (SFQ) is a classical logic family proposed for large-scale in-fridge controllers. SFQ logic has the potential to maximize scalability thanks to its ultra-high speed and very low power consumption. However, architecture design for SFQ logic poses challenges due to its unconventional pulse-driven nature and lack of dense memory and logic. Thus, research at the architecture level is essential to guide architects to design SFQ-based classical controllers for large-scale quantum machines. In this paper, we present DigiQ, the first system-level design of a Noisy Intermediate Scale Quantum (NISQ)-friendly SFQ-based classical controller. We perform a design space exploration of SFQ-based controllers and co-design the quantum gate decompositions and SFQ-based implementation of those decompositions to find an optimal SFQ-friendly design point that trades area and power for latency and control while ensuring good quantum algorithmic performance. Our co-design results in a single instruction, multiple data (SIMD) controller architecture, which has high scalability (>42,000-qubit scales), but imposes new challenges on the calibration of control pulses. We present software-level solutions to address these challenges, which if unaddressed would degrade quantum circuit fidelity given the imperfections of qubit hardware. △ Less

Submitted 2 February, 2022; originally announced February 2022.

Optimized fermionic SWAP networks with equivalent circuit averaging for QAOA

Authors: Akel Hashim, Rich Rines, Victory Omole, Ravi K. Naik, John Mark Kreikebaum, David I. Santiago, Frederic T. Chong, Irfan Siddiqi, Pranav Gokhale

Abstract: The fermionic SWAP network is a qubit routing sequence that can be used to efficiently execute the Quantum Approximate Optimization Algorithm (QAOA). Even with a minimally-connected topology on an n-qubit processor, this routing sequence enables O(n^2) operations to execute in O(n) steps. In this work, we optimize the execution of fermionic SWAP networks for QAOA through two techniques. First, we… ▽ More The fermionic SWAP network is a qubit routing sequence that can be used to efficiently execute the Quantum Approximate Optimization Algorithm (QAOA). Even with a minimally-connected topology on an n-qubit processor, this routing sequence enables O(n^2) operations to execute in O(n) steps. In this work, we optimize the execution of fermionic SWAP networks for QAOA through two techniques. First, we take advantage of an overcomplete set of native hardware operations [including 150 ns controlled-pi/2 phase gates with up to 99.67(1)% fidelity] in order to decompose the relevant quantum gates and SWAP networks in a manner which minimizes circuit depth and maximizes gate cancellation. Second, we introduce Equivalent Circuit Averaging, which randomizes over degrees of freedom in the quantum circuit compilation to reduce the impact of systematic coherent errors. Our techniques are experimentally validated on the Advanced Quantum Testbed through the execution of QAOA circuits for finding the ground state of two- and four-node Sherrington-Kirkpatrick spin-glass models with various randomly sampled parameters. We observe a ~60% average reduction in error (total variation distance) for QAOA of depth p = 1 on four transmon qubits on a superconducting quantum processor. △ Less

Submitted 11 November, 2021; v1 submitted 8 November, 2021; originally announced November 2021.

Systematic Crosstalk Mitigation for Superconducting Qubits via Frequency-Aware Compilation

Authors: Yongshan Ding, Pranav Gokhale, Sophia Fuhui Lin, Richard Rines, Thomas Propson, Frederic T. Chong

Abstract: One of the key challenges in current Noisy Intermediate-Scale Quantum (NISQ) computers is to control a quantum system with high-fidelity quantum gates. There are many reasons a quantum gate can go wrong -- for superconducting transmon qubits in particular, one major source of gate error is the unwanted crosstalk between neighboring qubits due to a phenomenon called frequency crowding. We motivate… ▽ More One of the key challenges in current Noisy Intermediate-Scale Quantum (NISQ) computers is to control a quantum system with high-fidelity quantum gates. There are many reasons a quantum gate can go wrong -- for superconducting transmon qubits in particular, one major source of gate error is the unwanted crosstalk between neighboring qubits due to a phenomenon called frequency crowding. We motivate a systematic approach for understanding and mitigating the crosstalk noise when executing near-term quantum programs on superconducting NISQ computers. We present a general software solution to alleviate frequency crowding by systematically tuning qubit frequencies according to input programs, trading parallelism for higher gate fidelity when necessary. The net result is that our work dramatically improves the crosstalk resilience of tunable-qubit, fixed-coupler hardware, matching or surpassing other more complex architectural designs such as tunable-coupler systems. On NISQ benchmarks, we improve worst-case program success rate by 13.3x on average, compared to existing traditional serialization strategies. △ Less

Submitted 21 August, 2020; originally announced August 2020.

Empirical determination of the simulation capacity of a near-term quantum computer

Authors: Rich Rines, Kevin Obenland, Isaac Chuang

Abstract: Experimentally realizable quantum computers are rapidly approaching the threshold of quantum supremacy. Quantum Hamiltonian simulation promises to be one of the first practical applications for which such a device could demonstrate an advantage over all classical systems. However, these early devices will inevitably remain both noisy and small, precluding the use of quantum error correction. We us… ▽ More Experimentally realizable quantum computers are rapidly approaching the threshold of quantum supremacy. Quantum Hamiltonian simulation promises to be one of the first practical applications for which such a device could demonstrate an advantage over all classical systems. However, these early devices will inevitably remain both noisy and small, precluding the use of quantum error correction. We use high-performance classical tools to construct, optimize, and simulate quantum circuits subject to realistic error models in order to empirically determine the "simulation capacity" of near-term simulation experiments implemented via quantum signal processing (QSP), describing the relationship between simulation time, system size, and resolution of QSP circuits which are optimally configured to balance algorithmic precision and external noise. From simulation capacity models, we estimate maximum tolerable error rate for meaningful simulation experiments on a near-term quantum computer. By exploiting symmetry inherent to the QSP circuit, we further demonstrate that its capacity for quantum simulation can be increased by at least two orders of magnitude if errors are systematic and unitary. We find that a device with $ε^2=10^{-5}$ systematic amplitude errors could meaningfully simulate systems up to $n\approx16$ with an expected failure rate below $10\%$, whereas the largest system a device with a stochastic error rate of $p_ε=10^{-5}$ could meaningfully simulate with the same rate of failure is between $n=3$ and $n=5$ (depending on the stochastic channel). Extrapolating from empirical results, we estimate that one would typically need a stochastic error rate below $p_ε=10^{-8}$ to perform a meaningful $n=50$ simulation experiment with a failure rate below $10\%$, while the same experiment could tolerate systematic unitary errors with strength $ε^2\approx10^{-6}$. △ Less

Submitted 26 May, 2019; originally announced May 2019.

High Performance Quantum Modular Multipliers

Authors: Rich Rines, Isaac Chuang

Abstract: We present a novel set of reversible modular multipliers applicable to quantum computing, derived from three classical techniques: 1) traditional integer division, 2) Montgomery residue arithmetic, and 3) Barrett reduction. Each multiplier computes an exact result for all binary input values, while maintaining the asymptotic resource complexity of a single (non-modular) integer multiplier. We addi… ▽ More We present a novel set of reversible modular multipliers applicable to quantum computing, derived from three classical techniques: 1) traditional integer division, 2) Montgomery residue arithmetic, and 3) Barrett reduction. Each multiplier computes an exact result for all binary input values, while maintaining the asymptotic resource complexity of a single (non-modular) integer multiplier. We additionally conduct an empirical resource analysis of our designs in order to determine the total gate count and circuit depth of each fully constructed circuit, with inputs as large as 2048 bits. Our comparative analysis considers both circuit implementations which allow for arbitrary (controlled) rotation gates, as well as those restricted to a typical fault-tolerant gate set. △ Less

Submitted 3 January, 2018; originally announced January 2018.

Parallel Position-Controlled Composite Quantum Logic Gates with Trapped Ions

Authors: Michael S. Gutierrez, Guang Hao Low, Richard Rines, Helena Zhang

Abstract: We demonstrate parallel composite quantum logic gates with phases implemented locally through nanoscale movement of ions within a global laser beam of fixed pulse duration. We show that a simple four-pulse sequence suffices for constructing ideal arbitrary single-qubit rotations in the presence of large intensity inhomogeneities across the ion trap due to laser beam-pointing or beam-focusing. Usin… ▽ More We demonstrate parallel composite quantum logic gates with phases implemented locally through nanoscale movement of ions within a global laser beam of fixed pulse duration. We show that a simple four-pulse sequence suffices for constructing ideal arbitrary single-qubit rotations in the presence of large intensity inhomogeneities across the ion trap due to laser beam-pointing or beam-focusing. Using such sequences, we perform parallel arbitrary rotations on ions in two trapping zones separated by 700 $μ$m with fidelities comparable to those of our standard laser-controlled gates. Our scheme improves on current transport or zone-dependent quantum gates to include phase modulation with local control of the ion's confinement potential. This enables a scalable implementation of an arbitrary number of parallel operations on densely packed qubits with a single laser modulator and beam path. △ Less

Submitted 12 February, 2017; originally announced February 2017.

Iterative Precision Measurement of Branching Ratios Applied to 5P states in 88Sr+

Authors: Helena Zhang, Michael Gutierrez, Guang Hao Low, Richard Rines, Jules Stuart, Tailin Wu, Isaac Chuang

Abstract: We report on a method for measuring the branching ratios of dipole transitions of trapped atomic ions by performing nested sequences of population inversions. This scheme is broadly applicable and does not use ultrafast pulsed or narrow linewidth lasers. It is simple to perform and insensitive to experimental variables such as laser and magnetic field noise as well as ion heating. To demonstrate i… ▽ More We report on a method for measuring the branching ratios of dipole transitions of trapped atomic ions by performing nested sequences of population inversions. This scheme is broadly applicable and does not use ultrafast pulsed or narrow linewidth lasers. It is simple to perform and insensitive to experimental variables such as laser and magnetic field noise as well as ion heating. To demonstrate its effectiveness, we make the most accurate measurements thus far of the branching ratios of both 5P1/2 and 5P3/2 states in 88Sr+ with sub-1% uncertainties. We measure 17.175(27) for the branching ratio of 5P1/2-5S1/2, 15.845(71) for 5P3/2-5S1/2, and 0.05609(21) for 5P3/2-4D5/2, ten- fold and thirty-fold improvements in precision for 5P1/2 and 5P3/2 branching ratios respectively over the best previous experimental values. △ Less

Submitted 13 May, 2016; originally announced May 2016.

Journal ref: New J. Phys. 18 (2016) 123021

Realization of a scalable Shor algorithm

Authors: Thomas Monz, Daniel Nigg, Esteban A. Martinez, Matthias F. Brandl, Philipp Schindler, Richard Rines, Shannon X. Wang, Isaac L. Chuang, Rainer Blatt

Abstract: Quantum computers are able to outperform classical algorithms. This was long recognized by the visionary Richard Feynman who pointed out in the 1980s that quantum mechanical problems were better solved with quantum machines. It was only in 1994 that Peter Shor came up with an algorithm that is able to calculate the prime factors of a large number vastly more efficiently than known possible with a… ▽ More Quantum computers are able to outperform classical algorithms. This was long recognized by the visionary Richard Feynman who pointed out in the 1980s that quantum mechanical problems were better solved with quantum machines. It was only in 1994 that Peter Shor came up with an algorithm that is able to calculate the prime factors of a large number vastly more efficiently than known possible with a classical computer. This paradigmatic algorithm stimulated the flourishing research in quantum information processing and the quest for an actual implementation of a quantum computer. Over the last fifteen years, using skillful optimizations, several instances of a Shor algorithm have been implemented on various platforms and clearly proved the feasibility of quantum factoring. For general scalability, though, a different approach has to be pursued. Here, we report the realization of a fully scalable Shor algorithm as proposed by Kitaev. For this, we demonstrate factoring the number fifteen by effectively employing and controlling seven qubits and four "cache-qubits", together with the implementation of generalized arithmetic operations, known as modular multipliers. The scalable algorithm has been realized with an ion-trap quantum computer exhibiting success probabilities in excess of 90%. △ Less

Submitted 31 July, 2015; originally announced July 2015.

Comments: 5 pages, 3 figures, 4 pages suppl. material (incl. 1 figure)