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Florian Cacho
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Publications
- 2023
- [c39]Yunus Emre Aslan, Florian Cacho, T. Kumar, D. K. Janardan, A. Kumar, F. Giner, M. Faurichon, Lorena Anghel
:
Minimum SRAM Retention Voltage: Insight about optimizing Power Efficiency across Temperature Profile, Process Variation and Aging. IOLTS 2023: 1-6 - 2022
- [j8]Lorena Anghel
Design-Time Exploration for Process, Environment and Aging Compensation Techniques for Low Power Reliable-Aware Design. IEEE Trans. Emerg. Top. Comput. 10(2): 581-590 (2022) - 2021
- [c32]Florian Cacho, Lorena Anghel
Monitoring Setup and Hold Timing Limits. IRPS 2021: 1-6 - 2018
- [c23]Ajith Sivadasan, Riddhi Jitendrakumar Shah, Vincent Huard, Florian Cacho, Lorena Anghel:
NBTI aged cell rejuvenation with back biasing and resulting critical path reordering for digital circuits in 28nm FDSOI. DATE 2018: 997-998 - [c20]Riddhi Jitendrakumar Shah, Florian Cacho, Vincent Huard, Souhir Mhira, D. Arora, Pankaj Agarwal, Shubham Kumar, S. Balaraman, Bijoy Kumar Singh, Lorena Anghel:
Investigation of speed sensors accuracy for process and aging compensation. IRPS 2018: 5 - 2017
- [c19]Ajith Sivadasan, Armelle Notin, Vincent Huard, Etienne Maurin, Souhir Mhira, Florian Cacho, Lorena Anghel:
Workload dependent reliability timing analysis flow. DATE 2017: 736-737 - [c16]Florian Cacho, Ahmed Benhassain, Riddhi Jitendrakumar Shah, Souhir Mhira, Vincent Huard, Lorena Anghel:
Investigation of critical path selection for in-situ monitors insertion. IOLTS 2017: 247-252 - 2016
- [c14]Ahmed Benhassain, Florian Cacho, Vincent Huard, Lorena Anghel:
Early failure prediction by using in-situ monitors: Implementation and application results. ERMAVSS@DATE 2016: 21-24 - [c13]Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel:
Workload Impact on BTI HCI Induced Aging of Digital Circuits: A System level Analysis. ERMAVSS@DATE 2016: 38-40 - [c12]Ajith Sivadasan, Florian Cacho, Sidi Ahmed Benhassain, Vincent Huard, Lorena Anghel:
Study of workload impact on BTI HCI induced aging of digital circuits. DATE 2016: 1020-1021 - [c10]Florian Cacho, Ahmed Benhassain, Souhir Mhira, Ajith Sivadasan, Vincent Huard, P. Cathelin, Vincent Knopik, Abhishek Jain, C. R. Parthasarathy, Lorena Anghel:
Activity profiling: Review of different solutions to develop reliable and performant design. IOLTS 2016: 47-50 - [c9]Ahmed Benhassain, Souhir Mhira, Florian Cacho, Vincent Huard, Lorena Anghel:
In-situ slack monitors: taking up the challenge of on-die monitoring of variability and reliability. IVSW 2016: 1-5 - [c7]Lorena Anghel, Ahmed Benhassain, Ajith Sivadasan, Florian Cacho, Vincent Huard:
Early system failure prediction by using aging in situ monitors: Methodology of implementation and application results. VTS 2016: 1 - 2015
- [c6]Ahmed Benhassain, Florian Cacho, Vincent Huard, M. Saliva, Lorena Anghel, C. R. Parthasarathy, Abhishek Jain, Fabien Giner:
Timing in-situ monitors: Implementation strategy and applications results. CICC 2015: 1-4 - [c5]M. Saliva, Florian Cacho, Vincent Huard, X. Federspiel, D. Angot, Ahmed Benhassain, Alain Bravaix, Lorena Anghel:
Digital circuits reliability with in-situ monitors in 28nm fully depleted SOI. DATE 2015: 441-446 - [c4]M. Saliva, Florian Cacho, Cheikh Ndiaye, Vincent Huard, D. Angot, Alain Bravaix
Impact of gate oxide breakdown in logic gates from 28nm FDSOI CMOS technology. IRPS 2015: 4 - 2011
- [c1]N. Ruiz Amador, Vincent Huard, E. Pion, Florian Cacho, Damien Croain, V. Robert, Sylvain Engels, Philippe Flatresse, Lorena Anghel
Bottom-up digital system-level reliability modeling. CICC 2011: 1-4
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